
Mohammad M. Hoque
Examiner (ID: 19133, Phone: (571)272-6266 , Office: P/2817 )
| Most Active Art Unit | 2817 |
| Art Unit(s) | 2817, 2823 |
| Total Applications | 817 |
| Issued Applications | 634 |
| Pending Applications | 116 |
| Abandoned Applications | 111 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19038219
[patent_doc_number] => 20240088034
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => GAA DEVICE WITH THE SUBSTRATE INCLUDING EMBEDDED INSULATING STRUCTURE BETWEEN BSPDN AND CHANNELS
[patent_app_type] => utility
[patent_app_number] => 17/930739
[patent_app_country] => US
[patent_app_date] => 2022-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5200
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17930739
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/930739 | GAA DEVICE WITH THE SUBSTRATE INCLUDING EMBEDDED INSULATING STRUCTURE BETWEEN BSPDN AND CHANNELS | Sep 8, 2022 | Pending |
Array
(
[id] => 19038219
[patent_doc_number] => 20240088034
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => GAA DEVICE WITH THE SUBSTRATE INCLUDING EMBEDDED INSULATING STRUCTURE BETWEEN BSPDN AND CHANNELS
[patent_app_type] => utility
[patent_app_number] => 17/930739
[patent_app_country] => US
[patent_app_date] => 2022-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5200
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17930739
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/930739 | GAA DEVICE WITH THE SUBSTRATE INCLUDING EMBEDDED INSULATING STRUCTURE BETWEEN BSPDN AND CHANNELS | Sep 8, 2022 | Pending |
Array
(
[id] => 18661495
[patent_doc_number] => 20230307509
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-28
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/939025
[patent_app_country] => US
[patent_app_date] => 2022-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7477
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939025
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/939025 | SEMICONDUCTOR DEVICE | Sep 6, 2022 | Pending |
Array
(
[id] => 19023145
[patent_doc_number] => 20240079316
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-07
[patent_title] => LOCAL ENLARGED VIA-TO-BACKSIDE POWER RAIL
[patent_app_type] => utility
[patent_app_number] => 17/903644
[patent_app_country] => US
[patent_app_date] => 2022-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8197
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17903644
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/903644 | Local enlarged via-to-backside power rail | Sep 5, 2022 | Issued |
Array
(
[id] => 18097738
[patent_doc_number] => 20220416079
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-29
[patent_title] => SEMICONDUCTOR DEVICE INCLUDING A POWER MOSFET AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/901416
[patent_app_country] => US
[patent_app_date] => 2022-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7010
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 273
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17901416
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/901416 | Manafacturing method for power MOSFET semiconductor device with improved breakdown voltage | Aug 31, 2022 | Issued |
Array
(
[id] => 19008093
[patent_doc_number] => 20240072164
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => VTFET WITH CONTROLLED FIN HEIGHT
[patent_app_type] => utility
[patent_app_number] => 17/823799
[patent_app_country] => US
[patent_app_date] => 2022-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6612
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17823799
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/823799 | VTFET with controlled fin height | Aug 30, 2022 | Issued |
Array
(
[id] => 20082608
[patent_doc_number] => 12356709
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-08
[patent_title] => Vertical field-effect transistor with isolation pillars
[patent_app_type] => utility
[patent_app_number] => 17/895299
[patent_app_country] => US
[patent_app_date] => 2022-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 31
[patent_no_of_words] => 3194
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17895299
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/895299 | Vertical field-effect transistor with isolation pillars | Aug 24, 2022 | Issued |
Array
(
[id] => 18258489
[patent_doc_number] => 20230085529
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-16
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/892177
[patent_app_country] => US
[patent_app_date] => 2022-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15677
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892177
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/892177 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD | Aug 21, 2022 | Pending |
Array
(
[id] => 18258489
[patent_doc_number] => 20230085529
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-16
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/892177
[patent_app_country] => US
[patent_app_date] => 2022-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15677
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892177
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/892177 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD | Aug 21, 2022 | Pending |
Array
(
[id] => 18615953
[patent_doc_number] => 20230282692
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-07
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/889945
[patent_app_country] => US
[patent_app_date] => 2022-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5933
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 407
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17889945
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/889945 | Semiconductor device having control electrodes in termination region | Aug 16, 2022 | Issued |
Array
(
[id] => 18348808
[patent_doc_number] => 20230136919
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-04
[patent_title] => IMAGE SENSOR AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/886578
[patent_app_country] => US
[patent_app_date] => 2022-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10394
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886578
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/886578 | IMAGE SENSOR AND METHOD OF FABRICATING THE SAME | Aug 11, 2022 | Pending |
Array
(
[id] => 18310418
[patent_doc_number] => 20230114318
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-13
[patent_title] => SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/886496
[patent_app_country] => US
[patent_app_date] => 2022-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 32386
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886496
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/886496 | Display device | Aug 11, 2022 | Issued |
Array
(
[id] => 18211922
[patent_doc_number] => 20230058186
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-23
[patent_title] => ULTRA-SHALLOW DOPANT AND OHMIC CONTACT REGIONS BY SOLID STATE DIFFUSION
[patent_app_type] => utility
[patent_app_number] => 17/884090
[patent_app_country] => US
[patent_app_date] => 2022-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9178
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884090
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/884090 | Ultra-shallow dopant and ohmic contact regions by solid state diffusion | Aug 8, 2022 | Issued |
Array
(
[id] => 18024549
[patent_doc_number] => 20220376048
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-24
[patent_title] => Semiconductor Device Including Insulated Gate Bipolar Transistor
[patent_app_type] => utility
[patent_app_number] => 17/881926
[patent_app_country] => US
[patent_app_date] => 2022-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6265
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17881926
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/881926 | Semiconductor device including insulated gate bipolar transistor | Aug 4, 2022 | Issued |
Array
(
[id] => 18943621
[patent_doc_number] => 20240038760
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-01
[patent_title] => INTEGRATED CIRCUIT CELL WITH DUAL ROW, BACK-TO-BACK, TRANSISTOR BODY TIES
[patent_app_type] => utility
[patent_app_number] => 17/878825
[patent_app_country] => US
[patent_app_date] => 2022-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9622
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878825
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/878825 | INTEGRATED CIRCUIT CELL WITH DUAL ROW, BACK-TO-BACK, TRANSISTOR BODY TIES | Jul 31, 2022 | Pending |
Array
(
[id] => 18999289
[patent_doc_number] => 11916145
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-27
[patent_title] => Independent control of stacked semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/815396
[patent_app_country] => US
[patent_app_date] => 2022-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 25
[patent_no_of_words] => 9671
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815396
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/815396 | Independent control of stacked semiconductor device | Jul 26, 2022 | Issued |
Array
(
[id] => 19244630
[patent_doc_number] => 12015085
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-18
[patent_title] => Method of manufacturing a semiconductor device including etching polysilicon
[patent_app_type] => utility
[patent_app_number] => 17/874281
[patent_app_country] => US
[patent_app_date] => 2022-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 29
[patent_no_of_words] => 9174
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874281
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/874281 | Method of manufacturing a semiconductor device including etching polysilicon | Jul 25, 2022 | Issued |
Array
(
[id] => 20347543
[patent_doc_number] => 12471281
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-11
[patent_title] => Methods used in forming memory arrays having strings of memory cells
[patent_app_type] => utility
[patent_app_number] => 17/869586
[patent_app_country] => US
[patent_app_date] => 2022-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 35
[patent_no_of_words] => 2159
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869586
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/869586 | Methods used in forming memory arrays having strings of memory cells | Jul 19, 2022 | Issued |
Array
(
[id] => 20347543
[patent_doc_number] => 12471281
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-11
[patent_title] => Methods used in forming memory arrays having strings of memory cells
[patent_app_type] => utility
[patent_app_number] => 17/869586
[patent_app_country] => US
[patent_app_date] => 2022-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 35
[patent_no_of_words] => 2159
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869586
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/869586 | Methods used in forming memory arrays having strings of memory cells | Jul 19, 2022 | Issued |
Array
(
[id] => 18804342
[patent_doc_number] => 11837505
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-05
[patent_title] => Formation of hybrid isolation regions through recess and re-deposition
[patent_app_type] => utility
[patent_app_number] => 17/813862
[patent_app_country] => US
[patent_app_date] => 2022-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 7570
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17813862
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/813862 | Formation of hybrid isolation regions through recess and re-deposition | Jul 19, 2022 | Issued |