Search

Mohammad M. Hoque

Examiner (ID: 652, Phone: (571)272-6266 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2817, 2823
Total Applications
867
Issued Applications
667
Pending Applications
103
Abandoned Applications
114

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19597073 [patent_doc_number] => 12154927 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/866603 [patent_app_country] => US [patent_app_date] => 2022-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5367 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17866603 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/866603
Semiconductor structure Jul 17, 2022 Issued
Array ( [id] => 19314573 [patent_doc_number] => 12040400 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Method for forming semiconductor device structure with nanostructure [patent_app_type] => utility [patent_app_number] => 17/866803 [patent_app_country] => US [patent_app_date] => 2022-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 9682 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17866803 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/866803
Method for forming semiconductor device structure with nanostructure Jul 17, 2022 Issued
Array ( [id] => 17986276 [patent_doc_number] => 20220352313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 17/866986 [patent_app_country] => US [patent_app_date] => 2022-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17866986 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/866986
Semiconductor devices having gate structures with slanted sidewalls Jul 17, 2022 Issued
Array ( [id] => 18548397 [patent_doc_number] => 11721759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Method for forming gate metal structure having portions with different heights [patent_app_type] => utility [patent_app_number] => 17/811588 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5009 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17811588 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/811588
Method for forming gate metal structure having portions with different heights Jul 10, 2022 Issued
Array ( [id] => 20885984 [patent_doc_number] => 12702044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-04 [patent_title] => Substrate trench for improved hybrid bonding [patent_app_type] => utility [patent_app_number] => 17/854813 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 5724 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854813 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/854813
SUBSTRATE TRENCH FOR IMPROVED HYBRID BONDING Jun 29, 2022 Pending
Array ( [id] => 18183615 [patent_doc_number] => 20230044345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => LAYOUT STRUCTURE OF FLEXIBLE CIRCUIT BOARD [patent_app_type] => utility [patent_app_number] => 17/848481 [patent_app_country] => US [patent_app_date] => 2022-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1678 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848481 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/848481
LAYOUT STRUCTURE OF FLEXIBLE CIRCUIT BOARD Jun 23, 2022 Abandoned
Array ( [id] => 18848873 [patent_doc_number] => 20230411277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => EMBEDDED CAPACITORS WITH SHARED ELECTRODES [patent_app_type] => utility [patent_app_number] => 17/842972 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842972 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/842972
EMBEDDED CAPACITORS WITH SHARED ELECTRODES Jun 16, 2022 Pending
Array ( [id] => 18849119 [patent_doc_number] => 20230411523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => VERTICAL FIELD EFFECT TRANSISTOR WITH STRAINED CHANNEL [patent_app_type] => utility [patent_app_number] => 17/807011 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6017 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807011 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/807011
VERTICAL FIELD EFFECT TRANSISTOR WITH STRAINED CHANNEL Jun 14, 2022 Abandoned
Array ( [id] => 17900733 [patent_doc_number] => 20220310395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/839682 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7048 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17839682 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/839682
Semiconductor structure and method of manufacturing the same Jun 13, 2022 Issued
Array ( [id] => 19050660 [patent_doc_number] => 20240092629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => INTEGRATED MEMS ELECTROSTATIC MICRO-SPEAKER DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/838780 [patent_app_country] => US [patent_app_date] => 2022-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17838780 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/838780
Integrated MEMS electrostatic micro-speaker device and method Jun 12, 2022 Issued
Array ( [id] => 18126740 [patent_doc_number] => 20230012361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => POWER SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/837547 [patent_app_country] => US [patent_app_date] => 2022-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17300 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17837547 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/837547
POWER SEMICONDUCTOR DEVICE Jun 9, 2022 Pending
Array ( [id] => 19705123 [patent_doc_number] => 12199171 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-01-14 [patent_title] => Vertical tunneling field-effect transistor with enhanced current confinement [patent_app_type] => utility [patent_app_number] => 17/830874 [patent_app_country] => US [patent_app_date] => 2022-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5379 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17830874 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/830874
Vertical tunneling field-effect transistor with enhanced current confinement Jun 1, 2022 Issued
Array ( [id] => 18623943 [patent_doc_number] => 11757001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Radiation hardened high voltage superjunction MOSFET [patent_app_type] => utility [patent_app_number] => 17/804491 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6457 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17804491 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/804491
Radiation hardened high voltage superjunction MOSFET May 26, 2022 Issued
Array ( [id] => 20885770 [patent_doc_number] => 12701829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-04 [patent_title] => Inorganic light emitting diode including conductive members, display module and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/826441 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 2250 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17826441 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/826441
INORGANIC LIGHT EMITTING DIODE, DISPLAY MODULE AND MANUFACTURING METHOD THEREOF May 26, 2022 Pending
Array ( [id] => 18812858 [patent_doc_number] => 20230387195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => FIELD TERMINATION STRUCTURE FOR MONOLITHICALLY INTEGRATED POWER SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/751909 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17751909 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/751909
FIELD TERMINATION STRUCTURE FOR MONOLITHICALLY INTEGRATED POWER SEMICONDUCTOR DEVICES May 23, 2022 Pending
Array ( [id] => 19590074 [patent_doc_number] => 20240387631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => NANOWIRE, FABRICATION METHOD OF ARRAY SUBSTRATE, ARRAY SUBSTRATE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/273730 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13231 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18273730 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/273730
NANOWIRE, FABRICATION METHOD OF ARRAY SUBSTRATE, ARRAY SUBSTRATE AND ELECTRONIC DEVICE May 23, 2022 Pending
Array ( [id] => 17811075 [patent_doc_number] => 20220262910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => CONTACT STRUCTURE FOR TRANSISTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/738049 [patent_app_country] => US [patent_app_date] => 2022-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17738049 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/738049
Contact structure for transistor devices May 5, 2022 Issued
Array ( [id] => 18500544 [patent_doc_number] => 20230223338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => EQUALIZATION CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF, SENSE AMPLIFICATION CIRCUIT STRUCTURE AND MEMORY CIRCUIT STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/661548 [patent_app_country] => US [patent_app_date] => 2022-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5828 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17661548 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/661548
Equalization circuit structure and manufacturing method thereof, sense amplification circuit structure and memory circuit structure Apr 28, 2022 Issued
Array ( [id] => 17795655 [patent_doc_number] => 20220254747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/729728 [patent_app_country] => US [patent_app_date] => 2022-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8446 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17729728 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/729728
Semiconductor package and method for manufacturing the same Apr 25, 2022 Issued
Array ( [id] => 17780372 [patent_doc_number] => 20220246722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 17/727091 [patent_app_country] => US [patent_app_date] => 2022-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17727091 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/727091
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Apr 21, 2022 Abandoned
Menu