
Mohammed A. Bashar
Examiner (ID: 13174, Phone: (571)272-2908 , Office: P/2824 )
| Most Active Art Unit | 2824 |
| Art Unit(s) | 2824 |
| Total Applications | 746 |
| Issued Applications | 652 |
| Pending Applications | 90 |
| Abandoned Applications | 33 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18235792
[patent_doc_number] => 11600356
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-03-07
[patent_title] => Memory device capable of repairing defective word lines
[patent_app_type] => utility
[patent_app_number] => 17/476496
[patent_app_country] => US
[patent_app_date] => 2021-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 4795
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 276
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17476496
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/476496 | Memory device capable of repairing defective word lines | Sep 15, 2021 | Issued |
Array
(
[id] => 19030345
[patent_doc_number] => 11929716
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-12
[patent_title] => Sense amplifier, memory and method for controlling sense amplifier
[patent_app_type] => utility
[patent_app_number] => 17/472778
[patent_app_country] => US
[patent_app_date] => 2021-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 9088
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 258
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17472778
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/472778 | Sense amplifier, memory and method for controlling sense amplifier | Sep 12, 2021 | Issued |
Array
(
[id] => 18633596
[patent_doc_number] => 20230292523
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-14
[patent_title] => THREE-DIMENSIONAL FLASH MEMORY USING FERROELECTRIC LAYER ON BASIS OF BACK GATE STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/005875
[patent_app_country] => US
[patent_app_date] => 2021-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13334
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18005875
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/005875 | Three-dimensional flash memory using ferroelectric layer on basis of back gate structure | Aug 24, 2021 | Issued |
Array
(
[id] => 17447920
[patent_doc_number] => 20220068425
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-03
[patent_title] => METHOD AND DEVICE FOR DETERMINING FAIL BIT REPAIR SOLUTION, AND CHIP
[patent_app_type] => utility
[patent_app_number] => 17/402758
[patent_app_country] => US
[patent_app_date] => 2021-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6435
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17402758
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/402758 | Method and device for determining fail bit repair solution, and chip | Aug 15, 2021 | Issued |
Array
(
[id] => 18016421
[patent_doc_number] => 11508728
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-22
[patent_title] => Semiconductor memory device, method of driving the same and method of fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/401615
[patent_app_country] => US
[patent_app_date] => 2021-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 35
[patent_no_of_words] => 11426
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401615
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/401615 | Semiconductor memory device, method of driving the same and method of fabricating the same | Aug 12, 2021 | Issued |
Array
(
[id] => 17262886
[patent_doc_number] => 20210375871
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-02
[patent_title] => SEMICONDUCTOR MEMORY DEVICE, METHOD OF DRIVING THE SAME AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/401601
[patent_app_country] => US
[patent_app_date] => 2021-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11414
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401601
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/401601 | Semiconductor memory device, method of driving the same and method of fabricating the same | Aug 12, 2021 | Issued |
Array
(
[id] => 18481007
[patent_doc_number] => 11694758
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-04
[patent_title] => Changing scan frequency of a probabilistic data integrity scan based on data quality
[patent_app_type] => utility
[patent_app_number] => 17/397853
[patent_app_country] => US
[patent_app_date] => 2021-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10075
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17397853
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/397853 | Changing scan frequency of a probabilistic data integrity scan based on data quality | Aug 8, 2021 | Issued |
Array
(
[id] => 17878382
[patent_doc_number] => 11450403
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-09-20
[patent_title] => Semiconductor memory device capable of performing soft-post-package-repair operation
[patent_app_type] => utility
[patent_app_number] => 17/393998
[patent_app_country] => US
[patent_app_date] => 2021-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 16
[patent_no_of_words] => 6551
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393998
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/393998 | Semiconductor memory device capable of performing soft-post-package-repair operation | Aug 3, 2021 | Issued |
Array
(
[id] => 17941515
[patent_doc_number] => 11475974
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-18
[patent_title] => Memory device virtual blocks using half good blocks
[patent_app_type] => utility
[patent_app_number] => 17/393886
[patent_app_country] => US
[patent_app_date] => 2021-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 18735
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393886
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/393886 | Memory device virtual blocks using half good blocks | Aug 3, 2021 | Issued |
Array
(
[id] => 17779880
[patent_doc_number] => 20220246230
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-08-04
[patent_title] => MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/393288
[patent_app_country] => US
[patent_app_date] => 2021-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6162
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393288
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/393288 | Memory system | Aug 2, 2021 | Issued |
Array
(
[id] => 17318521
[patent_doc_number] => 20210407571
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-30
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/389654
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7323
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389654
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/389654 | SEMICONDUCTOR DEVICE | Jul 29, 2021 | Abandoned |
Array
(
[id] => 17886171
[patent_doc_number] => 20220301648
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-22
[patent_title] => APPARATUS FOR PERFORMING A REPAIR OPERATION
[patent_app_type] => utility
[patent_app_number] => 17/390371
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7504
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17390371
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/390371 | Apparatus for performing a repair operation | Jul 29, 2021 | Issued |
Array
(
[id] => 17956155
[patent_doc_number] => 11482268
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-25
[patent_title] => Leakage compensation for memory arrays
[patent_app_type] => utility
[patent_app_number] => 17/387327
[patent_app_country] => US
[patent_app_date] => 2021-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 18167
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387327
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/387327 | Leakage compensation for memory arrays | Jul 27, 2021 | Issued |
Array
(
[id] => 18645487
[patent_doc_number] => 11769565
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-26
[patent_title] => Memory device and operating method thereof
[patent_app_type] => utility
[patent_app_number] => 17/376411
[patent_app_country] => US
[patent_app_date] => 2021-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 17
[patent_no_of_words] => 12850
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17376411
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/376411 | Memory device and operating method thereof | Jul 14, 2021 | Issued |
Array
(
[id] => 17878383
[patent_doc_number] => 11450404
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-09-20
[patent_title] => Memory device including redundancy mats
[patent_app_type] => utility
[patent_app_number] => 17/370637
[patent_app_country] => US
[patent_app_date] => 2021-07-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 14779
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370637
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/370637 | Memory device including redundancy mats | Jul 7, 2021 | Issued |
Array
(
[id] => 18124474
[patent_doc_number] => 20230010086
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-12
[patent_title] => SYSTEM AND METHOD TO MINIMIZE CODEWORD FAILURE RATE
[patent_app_type] => utility
[patent_app_number] => 17/370564
[patent_app_country] => US
[patent_app_date] => 2021-07-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8239
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370564
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/370564 | System and method to minimize codeword failure rate | Jul 7, 2021 | Issued |
Array
(
[id] => 17637929
[patent_doc_number] => 11348658
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-31
[patent_title] => Memory controller and storage device including the same
[patent_app_type] => utility
[patent_app_number] => 17/359924
[patent_app_country] => US
[patent_app_date] => 2021-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 6241
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 297
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17359924
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/359924 | Memory controller and storage device including the same | Jun 27, 2021 | Issued |
Array
(
[id] => 17737756
[patent_doc_number] => 20220223218
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-14
[patent_title] => MEMORY REPAIR USING OPTIMIZED REDUNDANCY UTILIZATION
[patent_app_type] => utility
[patent_app_number] => 17/356647
[patent_app_country] => US
[patent_app_date] => 2021-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7881
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 206
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356647
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/356647 | Memory repair using optimized redundancy utilization | Jun 23, 2021 | Issued |
Array
(
[id] => 17158793
[patent_doc_number] => 20210319844
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-14
[patent_title] => MEMORY TEST METHOD AND RELATED DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/355946
[patent_app_country] => US
[patent_app_date] => 2021-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8759
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17355946
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/355946 | Memory test method and related device | Jun 22, 2021 | Issued |
Array
(
[id] => 17302761
[patent_doc_number] => 20210398600
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-23
[patent_title] => MEMORY AND OPERATION METHOD OF MEMORY
[patent_app_type] => utility
[patent_app_number] => 17/354423
[patent_app_country] => US
[patent_app_date] => 2021-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3850
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17354423
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/354423 | Memory and operation method of memory | Jun 21, 2021 | Issued |