Search

Mohammed A. Bashar

Examiner (ID: 5464, Phone: (571)272-2908 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
779
Issued Applications
680
Pending Applications
87
Abandoned Applications
34

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16528512 [patent_doc_number] => 20200402593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => DYNAMIC SWITCHING FOR IMPROVED POWER UTILIZATION [patent_app_type] => utility [patent_app_number] => 16/444671 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5544 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16444671 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/444671
Dynamic switching for improved power utilization Jun 17, 2019 Issued
Array ( [id] => 15388925 [patent_doc_number] => 10535661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-14 [patent_title] => Integrated memory and integrated assemblies [patent_app_type] => utility [patent_app_number] => 16/429486 [patent_app_country] => US [patent_app_date] => 2019-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 5370 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16429486 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/429486
Integrated memory and integrated assemblies Jun 2, 2019 Issued
Array ( [id] => 17246820 [patent_doc_number] => 20210366565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => MEMORY COMPONENT PROVIDED WITH A TEST INTERFACE [patent_app_type] => utility [patent_app_number] => 16/625234 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16625234 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/625234
Memory component provided with a test interface May 30, 2019 Issued
Array ( [id] => 15611015 [patent_doc_number] => 10586574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => Word line cache mode [patent_app_type] => utility [patent_app_number] => 16/428745 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6605 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16428745 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/428745
Word line cache mode May 30, 2019 Issued
Array ( [id] => 17637926 [patent_doc_number] => 11348655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Memory device with analog measurement mode features [patent_app_type] => utility [patent_app_number] => 16/625371 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5770 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16625371 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/625371
Memory device with analog measurement mode features May 30, 2019 Issued
Array ( [id] => 16944284 [patent_doc_number] => 11056535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Non-volatile memory element arrays in a wheatstone bridge arrangement [patent_app_type] => utility [patent_app_number] => 16/425360 [patent_app_country] => US [patent_app_date] => 2019-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3908 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16425360 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/425360
Non-volatile memory element arrays in a wheatstone bridge arrangement May 28, 2019 Issued
Array ( [id] => 15138909 [patent_doc_number] => 10482936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Signal training for prevention of metastability due to clocking indeterminacy [patent_app_type] => utility [patent_app_number] => 16/423852 [patent_app_country] => US [patent_app_date] => 2019-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7514 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16423852 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/423852
Signal training for prevention of metastability due to clocking indeterminacy May 27, 2019 Issued
Array ( [id] => 14842661 [patent_doc_number] => 20190279731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => MEMORY CONTROLLER FOR CONTROLLING MEMORY DEVICE BASED ON ERASE STATE INFORMATION AND METHOD OF OPERATING THE MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 16/421229 [patent_app_country] => US [patent_app_date] => 2019-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11464 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16421229 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/421229
Memory controller for controlling memory device based on erase state information and method of operating the memory controller May 22, 2019 Issued
Array ( [id] => 16471777 [patent_doc_number] => 20200373315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => NON-VOLATILE MEMORY (NVM) STRUCTURE USING HOT CARRIER INJECTION (HCI) [patent_app_type] => utility [patent_app_number] => 16/419606 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5330 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16419606 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/419606
NON-VOLATILE MEMORY (NVM) STRUCTURE USING HOT CARRIER INJECTION (HCI) May 21, 2019 Abandoned
Array ( [id] => 14810981 [patent_doc_number] => 20190272100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-05 [patent_title] => STACKED MEMORY DEVICE AND A MEMORY CHIP INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/418502 [patent_app_country] => US [patent_app_date] => 2019-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16418502 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/418502
Stacked memory device and a memory chip including the same May 20, 2019 Issued
Array ( [id] => 15217377 [patent_doc_number] => 20190371375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => MAJORITY VOTING PROCESSING DEVICE, SEMICONDUCTOR MEMORY DEVICE, AND MAJORITY VOTING METHOD FOR INFORMATION DATA [patent_app_type] => utility [patent_app_number] => 16/417019 [patent_app_country] => US [patent_app_date] => 2019-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8920 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16417019 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/417019
Majority voting processing device, semiconductor memory device, and majority voting method for information data May 19, 2019 Issued
Array ( [id] => 14812513 [patent_doc_number] => 20190272866 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-05 [patent_title] => APPARATUSES AND METHODS FOR PROVIDING DRIVING SIGNALS IN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/416059 [patent_app_country] => US [patent_app_date] => 2019-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7212 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16416059 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/416059
Apparatuses and methods for providing driving signals in semiconductor devices May 16, 2019 Issued
Array ( [id] => 15502851 [patent_doc_number] => 20200051614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => Integrated Assemblies Comprising Vertically-Stacked Memory Array Decks and Folded Digit Line Connections [patent_app_type] => utility [patent_app_number] => 16/408095 [patent_app_country] => US [patent_app_date] => 2019-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5749 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16408095 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/408095
Integrated assemblies comprising vertically-stacked memory array decks and folded digit line connections May 8, 2019 Issued
Array ( [id] => 16386242 [patent_doc_number] => 10811083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Integrated assemblies comprising supplemental sense-amplifier-circuitry for refresh [patent_app_type] => utility [patent_app_number] => 16/404525 [patent_app_country] => US [patent_app_date] => 2019-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 6256 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16404525 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/404525
Integrated assemblies comprising supplemental sense-amplifier-circuitry for refresh May 5, 2019 Issued
Array ( [id] => 18117758 [patent_doc_number] => 11549140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Systems and methods for writing, reading, and controlling data stored in a polymer [patent_app_type] => utility [patent_app_number] => 17/052519 [patent_app_country] => US [patent_app_date] => 2019-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 94 [patent_figures_cnt] => 123 [patent_no_of_words] => 62195 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17052519 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/052519
Systems and methods for writing, reading, and controlling data stored in a polymer May 1, 2019 Issued
Array ( [id] => 16574781 [patent_doc_number] => 10896706 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-19 [patent_title] => FX driver circuit [patent_app_type] => utility [patent_app_number] => 16/399159 [patent_app_country] => US [patent_app_date] => 2019-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 15052 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16399159 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/399159
FX driver circuit Apr 29, 2019 Issued
Array ( [id] => 15270107 [patent_doc_number] => 20190383788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => METHODS, COMPOSITIONS, AND DEVICES FOR INFORMATION STORAGE [patent_app_type] => utility [patent_app_number] => 16/399746 [patent_app_country] => US [patent_app_date] => 2019-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 50542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16399746 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/399746
Methods, compositions, and devices for information storage Apr 29, 2019 Issued
Array ( [id] => 15126893 [patent_doc_number] => 20190350080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => MOTHERBOARD AND MEMORY MODULE [patent_app_type] => utility [patent_app_number] => 16/394143 [patent_app_country] => US [patent_app_date] => 2019-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16394143 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/394143
Motherboard and memory module Apr 24, 2019 Issued
Array ( [id] => 16502296 [patent_doc_number] => 10867690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Memory modules and methods of operating memory systems including the same [patent_app_type] => utility [patent_app_number] => 16/392849 [patent_app_country] => US [patent_app_date] => 2019-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 11090 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16392849 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/392849
Memory modules and methods of operating memory systems including the same Apr 23, 2019 Issued
Array ( [id] => 14691083 [patent_doc_number] => 20190244657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => SEMICONDUCTOR MEMORY DEVICE MANAGING FLEXIBLE REFRESH SKIP AREA [patent_app_type] => utility [patent_app_number] => 16/389905 [patent_app_country] => US [patent_app_date] => 2019-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9910 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16389905 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/389905
Semiconductor memory device managing flexible refresh skip area Apr 18, 2019 Issued
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