Search

Mohammed A. Bashar

Examiner (ID: 5464, Phone: (571)272-2908 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
779
Issued Applications
680
Pending Applications
87
Abandoned Applications
34

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13799045 [patent_doc_number] => 20190013061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => APPARATUSES AND METHODS FOR DATA MOVEMENT [patent_app_type] => utility [patent_app_number] => 16/128245 [patent_app_country] => US [patent_app_date] => 2018-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22995 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16128245 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/128245
Apparatuses and methods for data movement Sep 10, 2018 Issued
Array ( [id] => 14024135 [patent_doc_number] => 20190074061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => ERASABLE BLOCK SEGMENTATION FOR MEMORY [patent_app_type] => utility [patent_app_number] => 16/123772 [patent_app_country] => US [patent_app_date] => 2018-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5762 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16123772 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/123772
Erasable block segmentation for memory Sep 5, 2018 Issued
Array ( [id] => 16846130 [patent_doc_number] => 11018227 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Semiconductor storage device, method of controlling semiconductor storage device, computer program product, and method of fabricating semiconductor storage device [patent_app_type] => utility [patent_app_number] => 16/117161 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 6852 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16117161 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/117161
Semiconductor storage device, method of controlling semiconductor storage device, computer program product, and method of fabricating semiconductor storage device Aug 29, 2018 Issued
Array ( [id] => 14984607 [patent_doc_number] => 10446223 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-15 [patent_title] => Data storage apparatus, and related systems and methods [patent_app_type] => utility [patent_app_number] => 16/116519 [patent_app_country] => US [patent_app_date] => 2018-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 24165 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16116519 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/116519
Data storage apparatus, and related systems and methods Aug 28, 2018 Issued
Array ( [id] => 16249248 [patent_doc_number] => 10748621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 16/111539 [patent_app_country] => US [patent_app_date] => 2018-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 11069 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16111539 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/111539
Memory device Aug 23, 2018 Issued
Array ( [id] => 13629223 [patent_doc_number] => 20180366164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => READ THRESHOLD VOLTAGE SELECTION [patent_app_type] => utility [patent_app_number] => 16/110456 [patent_app_country] => US [patent_app_date] => 2018-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16110456 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/110456
Read threshold voltage selection Aug 22, 2018 Issued
Array ( [id] => 14397325 [patent_doc_number] => 10311951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-04 [patent_title] => Refresh architecture and algorithm for non-volatile memories [patent_app_type] => utility [patent_app_number] => 16/108828 [patent_app_country] => US [patent_app_date] => 2018-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7054 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16108828 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/108828
Refresh architecture and algorithm for non-volatile memories Aug 21, 2018 Issued
Array ( [id] => 14737891 [patent_doc_number] => 10388354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Pre-writing memory cells of an array [patent_app_type] => utility [patent_app_number] => 16/109339 [patent_app_country] => US [patent_app_date] => 2018-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 14023 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16109339 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/109339
Pre-writing memory cells of an array Aug 21, 2018 Issued
Array ( [id] => 14281897 [patent_doc_number] => 20190138233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => MEMORY CONTROLLER AND STORAGE DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/057849 [patent_app_country] => US [patent_app_date] => 2018-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11135 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16057849 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/057849
Memory controller and storage device including the same Aug 7, 2018 Issued
Array ( [id] => 14472515 [patent_doc_number] => 20190187901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/052189 [patent_app_country] => US [patent_app_date] => 2018-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7037 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16052189 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/052189
Memory system and operating method thereof Jul 31, 2018 Issued
Array ( [id] => 14124965 [patent_doc_number] => 10249345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Memories having select devices between access lines and in memory cells [patent_app_type] => utility [patent_app_number] => 16/039559 [patent_app_country] => US [patent_app_date] => 2018-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3874 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16039559 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/039559
Memories having select devices between access lines and in memory cells Jul 18, 2018 Issued
Array ( [id] => 14506177 [patent_doc_number] => 20190196743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => DATA STORAGE DEVICE AND METHODS FOR PROCESSING DATA IN THE DATA STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/039613 [patent_app_country] => US [patent_app_date] => 2018-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16039613 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/039613
Data storage device and methods for processing data in the data storage device Jul 18, 2018 Issued
Array ( [id] => 15199887 [patent_doc_number] => 10497445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-03 [patent_title] => Memory control circuit, memory, and memory control method [patent_app_type] => utility [patent_app_number] => 16/037385 [patent_app_country] => US [patent_app_date] => 2018-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10269 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 364 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16037385 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/037385
Memory control circuit, memory, and memory control method Jul 16, 2018 Issued
Array ( [id] => 15259663 [patent_doc_number] => 20190378565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => METHOD AND APPARATUS FOR ADAPTIVE DATA RETENTION MANAGEMENT IN NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 16/035521 [patent_app_country] => US [patent_app_date] => 2018-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16035521 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/035521
Method and apparatus for adaptive data retention management in non-volatile memory Jul 12, 2018 Issued
Array ( [id] => 14284623 [patent_doc_number] => 20190139596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM, AND REFRESH METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/032361 [patent_app_country] => US [patent_app_date] => 2018-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13050 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16032361 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/032361
Semiconductor memory device, memory system, and refresh method thereof Jul 10, 2018 Issued
Array ( [id] => 16356233 [patent_doc_number] => 10796750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Sequential read mode static random access memory (SRAM) [patent_app_type] => utility [patent_app_number] => 16/031439 [patent_app_country] => US [patent_app_date] => 2018-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7594 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16031439 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/031439
Sequential read mode static random access memory (SRAM) Jul 9, 2018 Issued
Array ( [id] => 15351141 [patent_doc_number] => 20200013462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => RESISTIVE MEMORY DEVICE FOR MATRIX-VECTOR MULTIPLICATIONS [patent_app_type] => utility [patent_app_number] => 16/027347 [patent_app_country] => US [patent_app_date] => 2018-07-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16027347 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/027347
Resistive memory device for matrix-vector multiplications Jul 3, 2018 Issued
Array ( [id] => 16145675 [patent_doc_number] => 10705908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Semiconductor memory devices, memory systems including the same and methods of operating memory systems [patent_app_type] => utility [patent_app_number] => 16/015534 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 29 [patent_no_of_words] => 13482 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16015534 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/015534
Semiconductor memory devices, memory systems including the same and methods of operating memory systems Jun 21, 2018 Issued
Array ( [id] => 15273885 [patent_doc_number] => 20190385677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => THIN FILM BASED 1T-1R CELL WITH RESISTIVE RANDOM ACCESS MEMORY BELOW A BITLINE [patent_app_type] => utility [patent_app_number] => 16/011512 [patent_app_country] => US [patent_app_date] => 2018-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10498 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16011512 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/011512
Thin film based 1T-1R cell with resistive random access memory below a bitline Jun 17, 2018 Issued
Array ( [id] => 14735351 [patent_doc_number] => 10387075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Buffer circuit with data bit inversion [patent_app_type] => utility [patent_app_number] => 16/010664 [patent_app_country] => US [patent_app_date] => 2018-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4622 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16010664 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/010664
Buffer circuit with data bit inversion Jun 17, 2018 Issued
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