Mohammed A. Bashar

Array ( [id] => 15856847 [patent_doc_number] => 10643718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Non-volatile memory with countermeasure for program disturb including purge during precharge [patent_app_type] => utility [patent_app_number] => 16/002825 [patent_app_country] => US [patent_app_date] => 2018-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 18576 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16002825 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15922663 [patent_doc_number] => 10658582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Vertical resistive processing unit with air gap [patent_app_type] => utility [patent_app_number] => 16/001515 [patent_app_country] => US [patent_app_date] => 2018-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 6185 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16001515 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16067201 [patent_doc_number] => 10692560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Periodic calibrations during memory device self refresh [patent_app_type] => utility [patent_app_number] => 16/001869 [patent_app_country] => US [patent_app_date] => 2018-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3422 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16001869 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15259625 [patent_doc_number] => 20190378546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => METHODS AND APPARATUSES OF DRIVER CIRCUITS WITHOUT VOLTAGE LEVEL SHIFTERS [patent_app_type] => utility [patent_app_number] => 16/001743 [patent_app_country] => US [patent_app_date] => 2018-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6465 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16001743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16479297 [patent_doc_number] => 10854250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Memory device including a circuit for detecting word line defect and operating method thereof [patent_app_type] => utility [patent_app_number] => 15/997964 [patent_app_country] => US [patent_app_date] => 2018-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10353 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15997964 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13878273 [patent_doc_number] => 20190035477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => METHODS, CIRCUITS, DEVICES, AND SYSTEMS FOR SENSING AN NVM CELL [patent_app_type] => utility [patent_app_number] => 15/995926 [patent_app_country] => US [patent_app_date] => 2018-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15995926 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13434713 [patent_doc_number] => 20180268899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => ENHANCING NUCLEATION IN PHASE-CHANGE MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 15/980480 [patent_app_country] => US [patent_app_date] => 2018-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15980480 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14800691 [patent_doc_number] => 10403353 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-09-03 [patent_title] => Systems and methods for reducing coupling noise between propagation lines for die size efficiency [patent_app_type] => utility [patent_app_number] => 15/976705 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5357 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976705 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13558487 [patent_doc_number] => 20180330791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => Nonvolatile Digital Computing with Ferroelectric FET [patent_app_type] => utility [patent_app_number] => 15/976315 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31780 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976315 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14063477 [patent_doc_number] => 10236039 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Apparatuses and methods for chip identification in a memory package [patent_app_type] => utility [patent_app_number] => 15/973061 [patent_app_country] => US [patent_app_date] => 2018-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6452 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15973061 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14278045 [patent_doc_number] => 20190136307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => SYSTEMS AND METHODS FOR WRITING, READING, AND CONTROLLING DATA STORED IN A POLYMER [patent_app_type] => utility [patent_app_number] => 15/969745 [patent_app_country] => US [patent_app_date] => 2018-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 62599 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15969745 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13390271 [patent_doc_number] => 20180246678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => Methods of Operating Semiconductor Memory Devices with Selective Write-Back of Data for Error Scrubbing and Related Devices [patent_app_type] => utility [patent_app_number] => 15/969042 [patent_app_country] => US [patent_app_date] => 2018-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12884 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15969042 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14237573 [patent_doc_number] => 20190130959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => MEMORY DEVICE HAVING TWIN CELL MODE AND REFRESH METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/968276 [patent_app_country] => US [patent_app_date] => 2018-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5509 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15968276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14888629 [patent_doc_number] => 10424361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Physical unclonable function system and method [patent_app_type] => utility [patent_app_number] => 15/967511 [patent_app_country] => US [patent_app_date] => 2018-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 6554 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15967511 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15045155 [patent_doc_number] => 20190333582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => MEMORY START VOLTAGE MANAGEMENT [patent_app_type] => utility [patent_app_number] => 15/967265 [patent_app_country] => US [patent_app_date] => 2018-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15967265 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14397899 [patent_doc_number] => 10312241 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-06-04 [patent_title] => Integrated memory and integrated assemblies [patent_app_type] => utility [patent_app_number] => 15/965717 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 5333 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15965717 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18053356 [patent_doc_number] => 11526741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Automated method and associated device for the non-volatile storage, retrieval and management of message/label associations and vice versa, with maximum likelihood [patent_app_type] => utility [patent_app_number] => 16/499793 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 13411 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16499793 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13143845 [patent_doc_number] => 10089257 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => Semiconductor storage device and control method thereof [patent_app_type] => utility [patent_app_number] => 15/959354 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5030 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 464 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15959354 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14603055 [patent_doc_number] => 10354721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Storage bitcell [patent_app_type] => utility [patent_app_number] => 15/948918 [patent_app_country] => US [patent_app_date] => 2018-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3140 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15948918 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14616533 [patent_doc_number] => 10360970 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-23 [patent_title] => Standing and resonant wave clocking in DDR RCD and data buffer [patent_app_type] => utility [patent_app_number] => 15/924668 [patent_app_country] => US [patent_app_date] => 2018-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 11261 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15924668 [rel_patent_id] =>[rel_patent_doc_number] =>)