Search

Mohammed A. Bashar

Examiner (ID: 5464, Phone: (571)272-2908 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
779
Issued Applications
680
Pending Applications
87
Abandoned Applications
34

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12917278 [patent_doc_number] => 20180197602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-12 [patent_title] => MEMORY DEVICE HAVING RESISTANCE CHANGE MATERIAL AND OPERATING METHOD FOR THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/677052 [patent_app_country] => US [patent_app_date] => 2017-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15677052 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/677052
Memory device having resistance change material and operating method for the memory device Aug 14, 2017 Issued
Array ( [id] => 12571293 [patent_doc_number] => 10019350 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-10 [patent_title] => Dram and method for accessing a dram [patent_app_type] => utility [patent_app_number] => 15/667202 [patent_app_country] => US [patent_app_date] => 2017-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7364 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667202 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/667202
Dram and method for accessing a dram Aug 1, 2017 Issued
Array ( [id] => 12033569 [patent_doc_number] => 20170323668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'MEMORIES HAVING SELECT DEVICES BETWEEN ACCESS LINES AND IN MEMORY CELLS FORMED OF A SAME TYPE OF CIRCUIT ELEMENT' [patent_app_type] => utility [patent_app_number] => 15/656690 [patent_app_country] => US [patent_app_date] => 2017-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3899 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15656690 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/656690
Memories having select devices between access lines and in memory cells formed of a same type of circuit element Jul 20, 2017 Issued
Array ( [id] => 14858703 [patent_doc_number] => 10418085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Memory plate segmentation to reduce operating power [patent_app_type] => utility [patent_app_number] => 15/655675 [patent_app_country] => US [patent_app_date] => 2017-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12793 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15655675 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/655675
Memory plate segmentation to reduce operating power Jul 19, 2017 Issued
Array ( [id] => 14091639 [patent_doc_number] => 10241723 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-26 [patent_title] => Memory cards and storage systems including the same [patent_app_type] => utility [patent_app_number] => 15/652811 [patent_app_country] => US [patent_app_date] => 2017-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 9642 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15652811 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/652811
Memory cards and storage systems including the same Jul 17, 2017 Issued
Array ( [id] => 12895543 [patent_doc_number] => 20180190356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-05 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/651477 [patent_app_country] => US [patent_app_date] => 2017-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8344 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15651477 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/651477
Semiconductor memory device and method of operating the same Jul 16, 2017 Issued
Array ( [id] => 12800077 [patent_doc_number] => 20180158528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => CONTROL LOGIC, SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/648639 [patent_app_country] => US [patent_app_date] => 2017-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10415 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15648639 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/648639
Control logic, semiconductor memory device, and method of operating the same Jul 12, 2017 Issued
Array ( [id] => 12797131 [patent_doc_number] => 20180157546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/642896 [patent_app_country] => US [patent_app_date] => 2017-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15642896 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/642896
Semiconductor memory device and method for operating the same Jul 5, 2017 Issued
Array ( [id] => 13799033 [patent_doc_number] => 20190013055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => APPARATUSES AND METHODS FOR CONTROLLING WORD LINES AND SENSE AMPLIFIERS [patent_app_type] => utility [patent_app_number] => 15/642145 [patent_app_country] => US [patent_app_date] => 2017-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4390 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15642145 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/642145
Apparatuses and methods for controlling word lines and sense amplifiers Jul 4, 2017 Issued
Array ( [id] => 13187629 [patent_doc_number] => 10109340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Precharging and refreshing banks in memory device with bank group architecture [patent_app_type] => utility [patent_app_number] => 15/639725 [patent_app_country] => US [patent_app_date] => 2017-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 9538 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15639725 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/639725
Precharging and refreshing banks in memory device with bank group architecture Jun 29, 2017 Issued
Array ( [id] => 11990080 [patent_doc_number] => 20170294235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-12 [patent_title] => 'Memory Programming Methods and Memory Systems' [patent_app_type] => utility [patent_app_number] => 15/631162 [patent_app_country] => US [patent_app_date] => 2017-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6240 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15631162 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/631162
Memory programming methods and memory systems Jun 22, 2017 Issued
Array ( [id] => 15169231 [patent_doc_number] => 10490116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Semiconductor device, memory device, and display system [patent_app_type] => utility [patent_app_number] => 15/630025 [patent_app_country] => US [patent_app_date] => 2017-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 35 [patent_no_of_words] => 32479 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15630025 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/630025
Semiconductor device, memory device, and display system Jun 21, 2017 Issued
Array ( [id] => 14267205 [patent_doc_number] => 10283172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => Flexible memory system with a controller and a stack of memory [patent_app_type] => utility [patent_app_number] => 15/620490 [patent_app_country] => US [patent_app_date] => 2017-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3905 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15620490 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/620490
Flexible memory system with a controller and a stack of memory Jun 11, 2017 Issued
Array ( [id] => 14267205 [patent_doc_number] => 10283172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => Flexible memory system with a controller and a stack of memory [patent_app_type] => utility [patent_app_number] => 15/620490 [patent_app_country] => US [patent_app_date] => 2017-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3905 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15620490 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/620490
Flexible memory system with a controller and a stack of memory Jun 11, 2017 Issued
Array ( [id] => 14267205 [patent_doc_number] => 10283172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => Flexible memory system with a controller and a stack of memory [patent_app_type] => utility [patent_app_number] => 15/620490 [patent_app_country] => US [patent_app_date] => 2017-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3905 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15620490 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/620490
Flexible memory system with a controller and a stack of memory Jun 11, 2017 Issued
Array ( [id] => 14267205 [patent_doc_number] => 10283172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => Flexible memory system with a controller and a stack of memory [patent_app_type] => utility [patent_app_number] => 15/620490 [patent_app_country] => US [patent_app_date] => 2017-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3905 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15620490 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/620490
Flexible memory system with a controller and a stack of memory Jun 11, 2017 Issued
Array ( [id] => 12160986 [patent_doc_number] => 20180032252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'STACKED MEMORY DEVICE AND A MEMORY CHIP INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/617450 [patent_app_country] => US [patent_app_date] => 2017-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10621 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15617450 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/617450
Stacked memory device and a memory chip including the same Jun 7, 2017 Issued
Array ( [id] => 13171633 [patent_doc_number] => 10101931 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-10-16 [patent_title] => Mitigating read errors following programming in a multi-level non-volatile memory [patent_app_type] => utility [patent_app_number] => 15/613240 [patent_app_country] => US [patent_app_date] => 2017-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 8419 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15613240 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/613240
Mitigating read errors following programming in a multi-level non-volatile memory Jun 3, 2017 Issued
Array ( [id] => 13003699 [patent_doc_number] => 10025517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-17 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 15/611301 [patent_app_country] => US [patent_app_date] => 2017-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 9104 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15611301 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/611301
Memory system May 31, 2017 Issued
Array ( [id] => 11891642 [patent_doc_number] => 09762215 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-12 [patent_title] => 'Apparatuses and methods for voltage buffering' [patent_app_type] => utility [patent_app_number] => 15/607020 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2522 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607020 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607020
Apparatuses and methods for voltage buffering May 25, 2017 Issued
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