Search

Mohammed A. Bashar

Examiner (ID: 5464, Phone: (571)272-2908 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
779
Issued Applications
680
Pending Applications
87
Abandoned Applications
34

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12040256 [patent_doc_number] => 09818491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-14 [patent_title] => 'Memory device and operating method thereof' [patent_app_type] => utility [patent_app_number] => 15/059107 [patent_app_country] => US [patent_app_date] => 2016-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4869 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15059107 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/059107
Memory device and operating method thereof Mar 1, 2016 Issued
Array ( [id] => 13666671 [patent_doc_number] => 10163508 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Supporting multiple memory types in a memory slot [patent_app_type] => utility [patent_app_number] => 15/055153 [patent_app_country] => US [patent_app_date] => 2016-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7983 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15055153 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/055153
Supporting multiple memory types in a memory slot Feb 25, 2016 Issued
Array ( [id] => 12214651 [patent_doc_number] => 09911466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Read threshold voltage selection' [patent_app_type] => utility [patent_app_number] => 15/044185 [patent_app_country] => US [patent_app_date] => 2016-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6110 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15044185 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/044185
Read threshold voltage selection Feb 15, 2016 Issued
Array ( [id] => 11838581 [patent_doc_number] => 20170220301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'Memory Device for Emulating Dynamic Random Access Memory (DRAM)' [patent_app_type] => utility [patent_app_number] => 15/011344 [patent_app_country] => US [patent_app_date] => 2016-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4986 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15011344 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/011344
Memory device for emulating dynamic Random access memory (DRAM) Jan 28, 2016 Issued
Array ( [id] => 11495199 [patent_doc_number] => 20170069384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-09 [patent_title] => 'MEMORY SYSTEM AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/000481 [patent_app_country] => US [patent_app_date] => 2016-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7389 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15000481 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/000481
Memory system and program operation method based on program speed information Jan 18, 2016 Issued
Array ( [id] => 10787163 [patent_doc_number] => 20160133318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'HIGH-SPEED READABLE SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 15/000239 [patent_app_country] => US [patent_app_date] => 2016-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 18041 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15000239 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/000239
High-speed readable semiconductor storage device Jan 18, 2016 Issued
Array ( [id] => 11539286 [patent_doc_number] => 09613702 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-04 [patent_title] => 'NAND flash memory device with oblique architecture and memory cell array' [patent_app_type] => utility [patent_app_number] => 14/986124 [patent_app_country] => US [patent_app_date] => 2015-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3507 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14986124 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/986124
NAND flash memory device with oblique architecture and memory cell array Dec 30, 2015 Issued
Array ( [id] => 11321455 [patent_doc_number] => 09520202 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-13 [patent_title] => 'Programming verification control circuit and method for control thereof' [patent_app_type] => utility [patent_app_number] => 14/976704 [patent_app_country] => US [patent_app_date] => 2015-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6656 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14976704 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/976704
Programming verification control circuit and method for control thereof Dec 20, 2015 Issued
Array ( [id] => 12935260 [patent_doc_number] => 09830972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Semiconductor device and semiconductor system [patent_app_type] => utility [patent_app_number] => 14/969113 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6121 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14969113 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/969113
Semiconductor device and semiconductor system Dec 14, 2015 Issued
Array ( [id] => 11397760 [patent_doc_number] => 20170018296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-19 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE OUTPUTTING READ-BUSY SIGNAL AND MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/967621 [patent_app_country] => US [patent_app_date] => 2015-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14967621 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/967621
Semiconductor memory device outputting read-busy signal and memory system including the same Dec 13, 2015 Issued
Array ( [id] => 12229651 [patent_doc_number] => 09916898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-13 [patent_title] => 'EPROM cell array, method of operating the same, and memory device including the same' [patent_app_type] => utility [patent_app_number] => 14/968096 [patent_app_country] => US [patent_app_date] => 2015-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12115 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968096 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/968096
EPROM cell array, method of operating the same, and memory device including the same Dec 13, 2015 Issued
Array ( [id] => 11740280 [patent_doc_number] => 09704874 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'ROM segmented bitline circuit' [patent_app_type] => utility [patent_app_number] => 14/963437 [patent_app_country] => US [patent_app_date] => 2015-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2800 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14963437 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/963437
ROM segmented bitline circuit Dec 8, 2015 Issued
Array ( [id] => 11071011 [patent_doc_number] => 20160267975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 14/964383 [patent_app_country] => US [patent_app_date] => 2015-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9158 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14964383 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/964383
SEMICONDUCTOR MEMORY Dec 8, 2015 Abandoned
Array ( [id] => 11524269 [patent_doc_number] => 09607678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'Semiconductor memory device and memory system including same' [patent_app_type] => utility [patent_app_number] => 14/959003 [patent_app_country] => US [patent_app_date] => 2015-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13747 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14959003 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/959003
Semiconductor memory device and memory system including same Dec 3, 2015 Issued
Array ( [id] => 11411518 [patent_doc_number] => 09558829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-31 [patent_title] => 'System having a semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 14/957270 [patent_app_country] => US [patent_app_date] => 2015-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4947 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14957270 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/957270
System having a semiconductor integrated circuit device Dec 1, 2015 Issued
Array ( [id] => 11259194 [patent_doc_number] => 09484096 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-01 [patent_title] => 'Ternary content-addressable memory' [patent_app_type] => utility [patent_app_number] => 14/954935 [patent_app_country] => US [patent_app_date] => 2015-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4213 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14954935 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/954935
Ternary content-addressable memory Nov 29, 2015 Issued
Array ( [id] => 11551373 [patent_doc_number] => 09620226 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-11 [patent_title] => 'Data retention charge loss and read disturb compensation in solid-state data storage systems' [patent_app_type] => utility [patent_app_number] => 14/929080 [patent_app_country] => US [patent_app_date] => 2015-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8411 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929080 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929080
Data retention charge loss and read disturb compensation in solid-state data storage systems Oct 29, 2015 Issued
Array ( [id] => 11417394 [patent_doc_number] => 09564226 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-07 [patent_title] => 'Smart verify for programming non-volatile memory' [patent_app_type] => utility [patent_app_number] => 14/928436 [patent_app_country] => US [patent_app_date] => 2015-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 49 [patent_no_of_words] => 15549 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14928436 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/928436
Smart verify for programming non-volatile memory Oct 29, 2015 Issued
Array ( [id] => 10681646 [patent_doc_number] => 20160027791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-28 [patent_title] => 'Three-Dimensional Offset-Printed Memory' [patent_app_type] => utility [patent_app_number] => 14/876908 [patent_app_country] => US [patent_app_date] => 2015-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6326 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14876908 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/876908
Three-Dimensional Offset-Printed Memory Oct 6, 2015 Abandoned
Array ( [id] => 11532375 [patent_doc_number] => 20170092354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'MEMORY WITH READ CIRCUITRY AND METHOD OF OPERATING' [patent_app_type] => utility [patent_app_number] => 14/869419 [patent_app_country] => US [patent_app_date] => 2015-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5022 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14869419 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/869419
Memory with read circuitry and method of operating Sep 28, 2015 Issued
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