Search

Mohammed A. Bashar

Examiner (ID: 5464, Phone: (571)272-2908 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
779
Issued Applications
680
Pending Applications
87
Abandoned Applications
34

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10189468 [patent_doc_number] => 09218894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-22 [patent_title] => 'Device and method for memory repair using test logic' [patent_app_type] => utility [patent_app_number] => 13/963831 [patent_app_country] => US [patent_app_date] => 2013-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5361 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13963831 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/963831
Device and method for memory repair using test logic Aug 8, 2013 Issued
Array ( [id] => 10931209 [patent_doc_number] => 20140334230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-13 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND SYSTEM HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/958201 [patent_app_country] => US [patent_app_date] => 2013-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7991 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13958201 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/958201
Semiconductor memory device and system having the same Aug 1, 2013 Issued
Array ( [id] => 9811144 [patent_doc_number] => 20150023089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-22 [patent_title] => 'RESISTANCE VARIABLE ELEMENT METHODS AND APPARATUSES' [patent_app_type] => utility [patent_app_number] => 13/947807 [patent_app_country] => US [patent_app_date] => 2013-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7906 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13947807 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/947807
Resistance variable element methods and apparatuses Jul 21, 2013 Issued
Array ( [id] => 9745485 [patent_doc_number] => 20140281204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'FLEXIBLE MEMORY SYSTEM WITH A CONTROLLER AND A STACK OF MEMORY' [patent_app_type] => utility [patent_app_number] => 13/919503 [patent_app_country] => US [patent_app_date] => 2013-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4020 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13919503 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/919503
Flexible memory system with a controller and a stack of memory Jun 16, 2013 Issued
Array ( [id] => 10952323 [patent_doc_number] => 20140355344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'Adaptive Operation of Three Dimensional Memory' [patent_app_type] => utility [patent_app_number] => 13/908921 [patent_app_country] => US [patent_app_date] => 2013-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10997 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13908921 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/908921
Adaptive operation of three dimensional memory Jun 2, 2013 Issued
Array ( [id] => 9146808 [patent_doc_number] => 20130301331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'SEMICONDUCTOR DEVICE AND DRIVING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/889957 [patent_app_country] => US [patent_app_date] => 2013-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10870 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13889957 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/889957
Semiconductor device and driving method of semiconductor device May 7, 2013 Issued
Array ( [id] => 10910794 [patent_doc_number] => 20140313810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-23 [patent_title] => 'SWITCHABLY COUPLED DIGIT LINE SEGMENTS IN A MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/866693 [patent_app_country] => US [patent_app_date] => 2013-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2711 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13866693 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/866693
SWITCHABLY COUPLED DIGIT LINE SEGMENTS IN A MEMORY DEVICE Apr 18, 2013 Abandoned
Array ( [id] => 9824787 [patent_doc_number] => 08934278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-13 [patent_title] => 'Hybrid ternary content addressable memory' [patent_app_type] => utility [patent_app_number] => 13/730487 [patent_app_country] => US [patent_app_date] => 2012-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8701 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13730487 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/730487
Hybrid ternary content addressable memory Dec 27, 2012 Issued
Array ( [id] => 10865554 [patent_doc_number] => 08891272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Content addressable memory system' [patent_app_type] => utility [patent_app_number] => 13/711061 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 5975 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13711061 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/711061
Content addressable memory system Dec 10, 2012 Issued
Array ( [id] => 10028532 [patent_doc_number] => 09070438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-30 [patent_title] => 'Programming of phase-change memory cells' [patent_app_type] => utility [patent_app_number] => 13/667725 [patent_app_country] => US [patent_app_date] => 2012-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6846 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13667725 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/667725
Programming of phase-change memory cells Nov 1, 2012 Issued
Array ( [id] => 9451643 [patent_doc_number] => 20140122813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'STORAGE MEDIUM AND ACCESSING SYSTEM UTILIZING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/662551 [patent_app_country] => US [patent_app_date] => 2012-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2144 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13662551 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/662551
Storage medium and accessing system utilizing the same Oct 28, 2012 Issued
Array ( [id] => 9434139 [patent_doc_number] => 20140112045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-24 [patent_title] => 'MEMORY SYSTEM INCORPORATING A CIRCUIT TO GENERATE A DELAY SIGNAL AND AN ASSOCIATED METHOD OF OPERATING A MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/656829 [patent_app_country] => US [patent_app_date] => 2012-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10241 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13656829 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/656829
Memory system incorporating a circuit to generate a delay signal and an associated method of operating a memory system Oct 21, 2012 Issued
Array ( [id] => 9106136 [patent_doc_number] => 20130279268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'EEPROM CELL WITH STORAGE CAPACITOR' [patent_app_type] => utility [patent_app_number] => 13/653711 [patent_app_country] => US [patent_app_date] => 2012-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4522 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13653711 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/653711
EEPROM CELL WITH STORAGE CAPACITOR Oct 16, 2012 Abandoned
Array ( [id] => 11564428 [patent_doc_number] => 09627021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => '8-transistor dual-ported static random access memory' [patent_app_type] => utility [patent_app_number] => 13/648053 [patent_app_country] => US [patent_app_date] => 2012-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4331 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13648053 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/648053
8-transistor dual-ported static random access memory Oct 8, 2012 Issued
Array ( [id] => 11770107 [patent_doc_number] => 09378792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-28 [patent_title] => 'Method of writing to a spin torque magnetic random access memory' [patent_app_type] => utility [patent_app_number] => 13/631395 [patent_app_country] => US [patent_app_date] => 2012-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5464 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13631395 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/631395
Method of writing to a spin torque magnetic random access memory Sep 27, 2012 Issued
Array ( [id] => 8766283 [patent_doc_number] => 20130094320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'ADDRESS TRANSFORMING CIRCUITS INCLUDING A RANDOM CODE GENERATOR, AND RELATED SEMICONDUCTOR MEMORY DEVICES AND METHODS' [patent_app_type] => utility [patent_app_number] => 13/610995 [patent_app_country] => US [patent_app_date] => 2012-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6862 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13610995 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/610995
ADDRESS TRANSFORMING CIRCUITS INCLUDING A RANDOM CODE GENERATOR, AND RELATED SEMICONDUCTOR MEMORY DEVICES AND METHODS Sep 11, 2012 Abandoned
Array ( [id] => 11307390 [patent_doc_number] => 09514792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-06 [patent_title] => 'Semiconductor device having stacked layers' [patent_app_type] => utility [patent_app_number] => 13/610949 [patent_app_country] => US [patent_app_date] => 2012-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 9870 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13610949 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/610949
Semiconductor device having stacked layers Sep 11, 2012 Issued
Array ( [id] => 8820054 [patent_doc_number] => 20130121099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'AMPLIFIER CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/608535 [patent_app_country] => US [patent_app_date] => 2012-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8325 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13608535 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/608535
AMPLIFIER CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE Sep 9, 2012 Abandoned
Array ( [id] => 10125019 [patent_doc_number] => 09159384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Data sensing circuit and memory device including the same' [patent_app_type] => utility [patent_app_number] => 13/604425 [patent_app_country] => US [patent_app_date] => 2012-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2942 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604425 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/604425
Data sensing circuit and memory device including the same Sep 4, 2012 Issued
Array ( [id] => 9779637 [patent_doc_number] => 08854851 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-07 [patent_title] => 'Techniques for suppressing match indications at a content addressable memory' [patent_app_type] => utility [patent_app_number] => 13/602633 [patent_app_country] => US [patent_app_date] => 2012-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4716 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13602633 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/602633
Techniques for suppressing match indications at a content addressable memory Sep 3, 2012 Issued
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