Mohammed A. Bashar

Array ( [id] => 9203955 [patent_doc_number] => 20140003132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'APPARATUS FOR REDUCING WRITE MINIMUM SUPPLY VOLTAGE FOR MEMORY' [patent_app_type] => utility [patent_app_number] => 13/536521 [patent_app_country] => US [patent_app_date] => 2012-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7040 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13536521 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11221371 [patent_doc_number] => 09449713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-20 [patent_title] => 'Method for preconditioning thin film storage array for data retention' [patent_app_type] => utility [patent_app_number] => 13/532973 [patent_app_country] => US [patent_app_date] => 2012-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3204 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13532973 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8515100 [patent_doc_number] => 20120314508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'CONTROL CIRCUITRY FOR MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 13/494283 [patent_app_country] => US [patent_app_date] => 2012-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10106 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13494283 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9664081 [patent_doc_number] => 08811078 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-19 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/493671 [patent_app_country] => US [patent_app_date] => 2012-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4178 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13493671 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9870451 [patent_doc_number] => 08958231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-17 [patent_title] => 'Memory device including first to seventh transistors' [patent_app_type] => utility [patent_app_number] => 13/488507 [patent_app_country] => US [patent_app_date] => 2012-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 35 [patent_no_of_words] => 20705 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 427 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13488507 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9824812 [patent_doc_number] => 08934304 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-13 [patent_title] => 'Operating method of nonvolatile memory device and operating method of memory system including nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 13/471485 [patent_app_country] => US [patent_app_date] => 2012-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8559 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13471485 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11644852 [patent_doc_number] => 09666238 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Stacked DRAM device and method of manufacture' [patent_app_type] => utility [patent_app_number] => 14/114725 [patent_app_country] => US [patent_app_date] => 2012-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 7979 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14114725 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8488286 [patent_doc_number] => 20120287693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-15 [patent_title] => 'SEMICONDUCTOR DEVICE AND MEMORY DEVICE INCLUDING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/467269 [patent_app_country] => US [patent_app_date] => 2012-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 18504 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13467269 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9119783 [patent_doc_number] => 20130286705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'LOW POWER CONTENT ADDRESSABLE MEMORY HITLINE PRECHARGE AND SENSING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/456419 [patent_app_country] => US [patent_app_date] => 2012-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4159 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13456419 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9484748 [patent_doc_number] => 08730705 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-05-20 [patent_title] => 'Serial searching in memory devices configured for stacked arrangements' [patent_app_type] => utility [patent_app_number] => 13/455893 [patent_app_country] => US [patent_app_date] => 2012-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 17809 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13455893 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9337143 [patent_doc_number] => 20140063925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'PARALLEL PROGRAMMING MULTIPLE PHASE CHANGE MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 13/434739 [patent_app_country] => US [patent_app_date] => 2012-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6135 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13434739 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11227285 [patent_doc_number] => 09455011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-27 [patent_title] => 'Methods and systems to read a magnetic tunnel junction (MTJ) based memory cell based on a pulsed read current' [patent_app_type] => utility [patent_app_number] => 14/350997 [patent_app_country] => US [patent_app_date] => 2012-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4252 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14350997 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8938617 [patent_doc_number] => 20130188414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'VARIABLE RESISTANCE NONVOLATILE MEMORY ELEMENT WRITING METHOD AND VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/581925 [patent_app_country] => US [patent_app_date] => 2012-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 21447 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13581925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10877861 [patent_doc_number] => 08902654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/420767 [patent_app_country] => US [patent_app_date] => 2012-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 9415 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13420767 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8719325 [patent_doc_number] => 20130070542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-21 [patent_title] => 'Replica Circuit and It\'s Applications' [patent_app_type] => utility [patent_app_number] => 13/421255 [patent_app_country] => US [patent_app_date] => 2012-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10714 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13421255 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10144852 [patent_doc_number] => 09177664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Method, memory controller and system for reading data stored in flash memory' [patent_app_type] => utility [patent_app_number] => 13/402615 [patent_app_country] => US [patent_app_date] => 2012-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11824 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13402615 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9890337 [patent_doc_number] => 08976604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'Method and apparatus for copying data with a memory array having redundant memory' [patent_app_type] => utility [patent_app_number] => 13/372193 [patent_app_country] => US [patent_app_date] => 2012-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 8593 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13372193 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9952762 [patent_doc_number] => 09001562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-07 [patent_title] => 'Semiconductor memory device including a dummy block' [patent_app_type] => utility [patent_app_number] => 13/368611 [patent_app_country] => US [patent_app_date] => 2012-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7776 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13368611 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8346065 [patent_doc_number] => 20120206988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'NEGATIVE VOLTAGE GENERATOR AND SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/358121 [patent_app_country] => US [patent_app_date] => 2012-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 14262 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13358121 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8890162 [patent_doc_number] => 20130163346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'METHODS AND APPARATUSES FOR DETERMINING THRESHOLD VOLTAGE SHIFT' [patent_app_type] => utility [patent_app_number] => 13/335309 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5883 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13335309 [rel_patent_id] =>[rel_patent_doc_number] =>)