Search

Mohammed A. Bashar

Examiner (ID: 15502, Phone: (571)272-2908 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
757
Issued Applications
661
Pending Applications
87
Abandoned Applications
33

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20482652 [patent_doc_number] => 12531128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Memory device, memory system having the same and operating method thereof [patent_app_type] => utility [patent_app_number] => 18/364303 [patent_app_country] => US [patent_app_date] => 2023-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1232 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364303 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/364303
Memory device, memory system having the same and operating method thereof Aug 1, 2023 Issued
Array ( [id] => 20266829 [patent_doc_number] => 12437825 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => At-speed transition fault testing for a multi-port and multi-clock memory [patent_app_type] => utility [patent_app_number] => 18/228118 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 1259 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18228118 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/228118
At-speed transition fault testing for a multi-port and multi-clock memory Jul 30, 2023 Issued
Array ( [id] => 20482655 [patent_doc_number] => 12531131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Non-volatile memory with multiple data resolutions [patent_app_type] => utility [patent_app_number] => 18/361839 [patent_app_country] => US [patent_app_date] => 2023-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 28 [patent_no_of_words] => 15835 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361839 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361839
Non-volatile memory with multiple data resolutions Jul 28, 2023 Issued
Array ( [id] => 19687743 [patent_doc_number] => 20250006288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => NON-VOLATILE MEMORY WITH NEIGHBOR PLANE PROGRAM DISTURB AVOIDANCE [patent_app_type] => utility [patent_app_number] => 18/361843 [patent_app_country] => US [patent_app_date] => 2023-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21929 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361843 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361843
Non-volatile memory with neighbor plane program disturb avoidance Jul 28, 2023 Issued
Array ( [id] => 19687740 [patent_doc_number] => 20250006285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => EVOLVING BAD BLOCK DETECTION IN NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/360520 [patent_app_country] => US [patent_app_date] => 2023-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18386 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18360520 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/360520
Evolving bad block detection in non-volatile memory Jul 26, 2023 Issued
Array ( [id] => 18774028 [patent_doc_number] => 20230368858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => METHOD FOR LUT-FREE MEMORY REPAIR [patent_app_type] => utility [patent_app_number] => 18/359975 [patent_app_country] => US [patent_app_date] => 2023-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359975 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359975
Method for LUT-free memory repair Jul 26, 2023 Issued
Array ( [id] => 19467709 [patent_doc_number] => 20240321379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => NON-VOLATILE MEMORY WITH SLOW VOLTAGE RAMP COMPENSATION [patent_app_type] => utility [patent_app_number] => 18/359816 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359816 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359816
Non-volatile memory with slow voltage ramp compensation Jul 25, 2023 Issued
Array ( [id] => 19828594 [patent_doc_number] => 12249385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => Interface circuit, memory controller and method for calibrating signal processing devices in an interface circuit [patent_app_type] => utility [patent_app_number] => 18/225654 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11317 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225654 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/225654
Interface circuit, memory controller and method for calibrating signal processing devices in an interface circuit Jul 23, 2023 Issued
Array ( [id] => 19252509 [patent_doc_number] => 20240203506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => NON-VOLATILE MEMORY WITH HOLE PRE-CHARGE AND ISOLATED SIGNAL LINES [patent_app_type] => utility [patent_app_number] => 18/357399 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17726 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357399 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357399
NON-VOLATILE MEMORY WITH HOLE PRE-CHARGE AND ISOLATED SIGNAL LINES Jul 23, 2023 Pending
Array ( [id] => 20203960 [patent_doc_number] => 12406743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Non-volatile memory with smart control of overdrive voltage [patent_app_type] => utility [patent_app_number] => 18/357274 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 29 [patent_no_of_words] => 16075 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357274 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357274
Non-volatile memory with smart control of overdrive voltage Jul 23, 2023 Issued
Array ( [id] => 20305198 [patent_doc_number] => 12451194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Memory device for performing read operation and operating method thereof [patent_app_type] => utility [patent_app_number] => 18/356222 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1241 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356222 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/356222
Memory device for performing read operation and operating method thereof Jul 20, 2023 Issued
Array ( [id] => 20243968 [patent_doc_number] => 12424298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Control circuit, memory system and control method [patent_app_type] => utility [patent_app_number] => 18/354631 [patent_app_country] => US [patent_app_date] => 2023-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 3703 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18354631 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/354631
Control circuit, memory system and control method Jul 17, 2023 Issued
Array ( [id] => 20359962 [patent_doc_number] => 12475966 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Memory system, operating method of the same, and controller of memory device [patent_app_type] => utility [patent_app_number] => 18/222563 [patent_app_country] => US [patent_app_date] => 2023-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4693 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18222563 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/222563
Memory system, operating method of the same, and controller of memory device Jul 16, 2023 Issued
Array ( [id] => 19007472 [patent_doc_number] => 20240071543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => FUSE BASED REPLAY PROTECTION WITH DYNAMIC FUSE USAGE AND COUNTERMEASURES FOR FUSE VOLTAGE CUT ATTACKS [patent_app_type] => utility [patent_app_number] => 18/351625 [patent_app_country] => US [patent_app_date] => 2023-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18468 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18351625 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/351625
Fuse based replay protection with dynamic fuse usage and countermeasures for fuse voltage cut attacks Jul 12, 2023 Issued
Array ( [id] => 19687742 [patent_doc_number] => 20250006287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => NON-VOLATILE MEMORY WITH LAYOUT ADAPTIVE PROBLEMATIC WORD LINE DETECTION [patent_app_type] => utility [patent_app_number] => 18/346367 [patent_app_country] => US [patent_app_date] => 2023-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18346367 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/346367
Non-volatile memory with layout adaptive problematic word line detection Jul 2, 2023 Issued
Array ( [id] => 19687745 [patent_doc_number] => 20250006290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => HOST-TO-DEVICE INTERFACE CIRCUITRY TESTING [patent_app_type] => utility [patent_app_number] => 18/343377 [patent_app_country] => US [patent_app_date] => 2023-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18343377 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/343377
HOST-TO-DEVICE INTERFACE CIRCUITRY TESTING Jun 27, 2023 Pending
Array ( [id] => 20118229 [patent_doc_number] => 12367944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Memory device including test pad connection circuit [patent_app_type] => utility [patent_app_number] => 18/341192 [patent_app_country] => US [patent_app_date] => 2023-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 5856 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341192 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/341192
Memory device including test pad connection circuit Jun 25, 2023 Issued
Array ( [id] => 19634348 [patent_doc_number] => 20240412797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => Fully Scannable Memory Arrays [patent_app_type] => utility [patent_app_number] => 18/207482 [patent_app_country] => US [patent_app_date] => 2023-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18207482 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/207482
Fully Scannable Memory Arrays Jun 7, 2023 Pending
Array ( [id] => 19589381 [patent_doc_number] => 20240386938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => METHODS FOR CONTROLLING BIT LINE VOLTAGES IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/328186 [patent_app_country] => US [patent_app_date] => 2023-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10400 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18328186 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/328186
METHODS FOR CONTROLLING BIT LINE VOLTAGES IN MEMORY DEVICES Jun 1, 2023 Pending
Array ( [id] => 19237050 [patent_doc_number] => 20240194245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => STORAGE DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/325109 [patent_app_country] => US [patent_app_date] => 2023-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18325109 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/325109
Storage device and operating method thereof May 29, 2023 Issued
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