Search

Mohammed A. Hasan

Examiner (ID: 2668, Phone: (571)272-2331 , Office: P/2872 )

Most Active Art Unit
2872
Art Unit(s)
2872, 2873
Total Applications
2804
Issued Applications
2516
Pending Applications
112
Abandoned Applications
206

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18454100 [patent_doc_number] => 20230195380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => METHOD AND SYSTEM FOR IMPLEMENTATION OF SCALABLE QUEUE WITH DELAY [patent_app_type] => utility [patent_app_number] => 17/644586 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6896 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17644586 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/644586
Method and system for implementation of scalable queue with delay Dec 15, 2021 Issued
Array ( [id] => 18734599 [patent_doc_number] => 11803329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Methods and systems for processing write requests in a storage system [patent_app_type] => utility [patent_app_number] => 17/456012 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 9369 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17456012 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/456012
Methods and systems for processing write requests in a storage system Nov 21, 2021 Issued
Array ( [id] => 18591935 [patent_doc_number] => 11740831 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Storage optimization for event streaming for multiple consumers [patent_app_type] => utility [patent_app_number] => 17/454494 [patent_app_country] => US [patent_app_date] => 2021-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6538 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17454494 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/454494
Storage optimization for event streaming for multiple consumers Nov 10, 2021 Issued
Array ( [id] => 18795845 [patent_doc_number] => 11829632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Metrics aggregation [patent_app_type] => utility [patent_app_number] => 17/454247 [patent_app_country] => US [patent_app_date] => 2021-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5115 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17454247 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/454247
Metrics aggregation Nov 8, 2021 Issued
Array ( [id] => 17931760 [patent_doc_number] => 20220326885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) INTERFACE SYSTEM AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/522810 [patent_app_country] => US [patent_app_date] => 2021-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6954 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17522810 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/522810
Peripheral component interconnect express (PCIe) interface system and method of operating the same Nov 8, 2021 Issued
Array ( [id] => 18998031 [patent_doc_number] => 11914877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Managing access to block storage in cloud computing environments [patent_app_type] => utility [patent_app_number] => 17/513300 [patent_app_country] => US [patent_app_date] => 2021-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17513300 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/513300
Managing access to block storage in cloud computing environments Oct 27, 2021 Issued
Array ( [id] => 18400783 [patent_doc_number] => 11662919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Enhanced data clock operations in memory [patent_app_type] => utility [patent_app_number] => 17/494089 [patent_app_country] => US [patent_app_date] => 2021-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8416 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17494089 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/494089
Enhanced data clock operations in memory Oct 4, 2021 Issued
Array ( [id] => 17338168 [patent_doc_number] => 20220004499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-06 [patent_title] => HOST VIRTUAL ADDRESS SPACE FOR SECURE INTERFACE CONTROL STORAGE [patent_app_type] => utility [patent_app_number] => 17/475757 [patent_app_country] => US [patent_app_date] => 2021-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15995 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17475757 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/475757
Host virtual address space for secure interface control storage Sep 14, 2021 Issued
Array ( [id] => 19284336 [patent_doc_number] => 20240220812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => METHOD FOR TRAINING MACHINE TRANSLATION MODEL, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/474950 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17474950 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/474950
METHOD FOR TRAINING MACHINE TRANSLATION MODEL, AND ELECTRONIC DEVICE Sep 13, 2021 Pending
Array ( [id] => 17317140 [patent_doc_number] => 20210406189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => INFORMATION PROCESSING DEVICE, ACCESS CONTROLLER, INFORMATION PROCESSING METHOD, AND COMPUTER PROGRAM [patent_app_type] => utility [patent_app_number] => 17/469971 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8322 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17469971 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/469971
Information processing device, access controller, information processing method, and computer program for issuing access requests from a processor to a sub-processor Sep 8, 2021 Issued
Array ( [id] => 18637991 [patent_doc_number] => 11762591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Memory system and method of controlling nonvolatile memory by controlling the writing of data to and reading of data from a plurality of blocks in the nonvolatile memory [patent_app_type] => utility [patent_app_number] => 17/444856 [patent_app_country] => US [patent_app_date] => 2021-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 17873 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17444856 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/444856
Memory system and method of controlling nonvolatile memory by controlling the writing of data to and reading of data from a plurality of blocks in the nonvolatile memory Aug 10, 2021 Issued
Array ( [id] => 19107643 [patent_doc_number] => 11960752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Memory system and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/357084 [patent_app_country] => US [patent_app_date] => 2021-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 11986 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17357084 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/357084
Memory system and method of operating the same Jun 23, 2021 Issued
Array ( [id] => 17317634 [patent_doc_number] => 20210406683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => LEARNING METHOD AND INFORMATION PROCESSING APPARATUS [patent_app_type] => utility [patent_app_number] => 17/226279 [patent_app_country] => US [patent_app_date] => 2021-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15097 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17226279 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/226279
LEARNING METHOD AND INFORMATION PROCESSING APPARATUS Apr 8, 2021 Abandoned
Array ( [id] => 17613686 [patent_doc_number] => 20220155966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => Hybrid Cluster System and Computing Node Thereof [patent_app_type] => utility [patent_app_number] => 17/121609 [patent_app_country] => US [patent_app_date] => 2020-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3476 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17121609 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/121609
Hybrid Cluster System and Computing Node Thereof Dec 13, 2020 Abandoned
Array ( [id] => 16795832 [patent_doc_number] => 20210125649 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => IN-MEMORY LIGHTWEIGHT MEMORY COHERENCE PROTOCOL [patent_app_type] => utility [patent_app_number] => 17/066422 [patent_app_country] => US [patent_app_date] => 2020-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17066422 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/066422
In-memory lightweight memory coherence protocol Oct 7, 2020 Issued
Array ( [id] => 16615871 [patent_doc_number] => 20210034524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => STACKED MEMORY DEVICE SYSTEM INTERCONNECT DIRECTORY-BASED CACHE COHERENCE METHODOLOGY [patent_app_type] => utility [patent_app_number] => 17/066432 [patent_app_country] => US [patent_app_date] => 2020-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17066432 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/066432
Stacked memory device system interconnect directory-based cache coherence methodology Oct 7, 2020 Issued
Array ( [id] => 16543195 [patent_doc_number] => 20200409610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/022652 [patent_app_country] => US [patent_app_date] => 2020-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17022652 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/022652
Memory system Sep 15, 2020 Issued
Array ( [id] => 16675779 [patent_doc_number] => 20210064545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => HOME AGENT BASED CACHE TRANSFER ACCELERATION SCHEME [patent_app_type] => utility [patent_app_number] => 17/019999 [patent_app_country] => US [patent_app_date] => 2020-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4797 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17019999 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/019999
Home agent based cache transfer acceleration scheme Sep 13, 2020 Issued
Array ( [id] => 18606541 [patent_doc_number] => 11748005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Transferring memory system data to an auxiliary array [patent_app_type] => utility [patent_app_number] => 16/989599 [patent_app_country] => US [patent_app_date] => 2020-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 11744 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16989599 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/989599
Transferring memory system data to an auxiliary array Aug 9, 2020 Issued
Array ( [id] => 17572747 [patent_doc_number] => 11321015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Aggressive intent write request cancellation [patent_app_type] => utility [patent_app_number] => 16/856376 [patent_app_country] => US [patent_app_date] => 2020-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 9594 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16856376 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/856376
Aggressive intent write request cancellation Apr 22, 2020 Issued
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