Search

Mohammed Alam

Examiner (ID: 10623, Phone: (571)270-1507 , Office: P/2851 )

Most Active Art Unit
2851
Art Unit(s)
2825, 2851
Total Applications
1059
Issued Applications
934
Pending Applications
66
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18211565 [patent_doc_number] => 20230057828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => BALANCING CYCLE STEALING WITH EARLY MODE VIOLATIONS [patent_app_type] => utility [patent_app_number] => 17/407510 [patent_app_country] => US [patent_app_date] => 2021-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17407510 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/407510
Balancing cycle stealing with early mode violations Aug 19, 2021 Issued
Array ( [id] => 18268078 [patent_doc_number] => 20230089320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => LOGICAL NODE LAYOUT METHOD AND APPARATUS, COMPUTER DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/909417 [patent_app_country] => US [patent_app_date] => 2021-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17909417 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/909417
Logical node layout method and apparatus, computer device, and storage medium Aug 16, 2021 Issued
Array ( [id] => 17690823 [patent_doc_number] => 20220198116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => METHOD AND SYSTEM FOR LOGIC DESIGN PARTITIONING [patent_app_type] => utility [patent_app_number] => 17/402632 [patent_app_country] => US [patent_app_date] => 2021-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17402632 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/402632
Method and system for logic design partitioning Aug 15, 2021 Issued
Array ( [id] => 19018004 [patent_doc_number] => 11924966 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-03-05 [patent_title] => Reconfigurable circuit devices [patent_app_type] => utility [patent_app_number] => 17/402425 [patent_app_country] => US [patent_app_date] => 2021-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 31 [patent_no_of_words] => 17748 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17402425 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/402425
Reconfigurable circuit devices Aug 12, 2021 Issued
Array ( [id] => 18720391 [patent_doc_number] => 11797737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Finding equivalent classes of hard defects in stacked MOSFET arrays [patent_app_type] => utility [patent_app_number] => 17/400360 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11837 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400360 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/400360
Finding equivalent classes of hard defects in stacked MOSFET arrays Aug 11, 2021 Issued
Array ( [id] => 17413291 [patent_doc_number] => 20220048195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => System and Methods for Providing Battery Charging Service to Parked Electric Vehicles [patent_app_type] => utility [patent_app_number] => 17/397861 [patent_app_country] => US [patent_app_date] => 2021-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7049 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17397861 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/397861
System and methods for providing battery charging service to parked electric vehicles Aug 8, 2021 Issued
Array ( [id] => 18177670 [patent_doc_number] => 20230038399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => NOISE IMPACT ON FUNCTION (NIOF) REDUCTION FOR INTEGRATED CIRCUIT DESIGN [patent_app_type] => utility [patent_app_number] => 17/397197 [patent_app_country] => US [patent_app_date] => 2021-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17397197 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/397197
Noise impact on function (NIOF) reduction for integrated circuit design Aug 8, 2021 Issued
Array ( [id] => 18177592 [patent_doc_number] => 20230038321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => REGION-BASED LAYOUT ROUTING [patent_app_type] => utility [patent_app_number] => 17/395951 [patent_app_country] => US [patent_app_date] => 2021-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6159 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395951 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395951
Region-based layout routing Aug 5, 2021 Issued
Array ( [id] => 18839322 [patent_doc_number] => 11847396 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-12-19 [patent_title] => Integrated circuit design using multi-bit combinational cells [patent_app_type] => utility [patent_app_number] => 17/393869 [patent_app_country] => US [patent_app_date] => 2021-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12152 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393869 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/393869
Integrated circuit design using multi-bit combinational cells Aug 3, 2021 Issued
Array ( [id] => 18548627 [patent_doc_number] => 11721990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Power tool system having wireless communicator [patent_app_type] => utility [patent_app_number] => 17/393780 [patent_app_country] => US [patent_app_date] => 2021-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 47 [patent_no_of_words] => 30115 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393780 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/393780
Power tool system having wireless communicator Aug 3, 2021 Issued
Array ( [id] => 18183279 [patent_doc_number] => 20230044009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => VEHICLE ELECTRICAL SYSTEM [patent_app_type] => utility [patent_app_number] => 17/392597 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7923 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17392597 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/392597
Vehicle electrical system Aug 2, 2021 Issued
Array ( [id] => 17690822 [patent_doc_number] => 20220198115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 17/392218 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4693 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17392218 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/392218
Modular periphery tile for integrated circuit device Aug 1, 2021 Issued
Array ( [id] => 19167568 [patent_doc_number] => 11983476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Technology-independent line end routing [patent_app_type] => utility [patent_app_number] => 17/389931 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 27 [patent_no_of_words] => 15956 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/389931
Technology-independent line end routing Jul 29, 2021 Issued
Array ( [id] => 18506630 [patent_doc_number] => 11704448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Computer implemented system and method of translation of verification commands of an electronic design [patent_app_type] => utility [patent_app_number] => 17/385505 [patent_app_country] => US [patent_app_date] => 2021-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 13028 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 385 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17385505 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/385505
Computer implemented system and method of translation of verification commands of an electronic design Jul 25, 2021 Issued
Array ( [id] => 17216719 [patent_doc_number] => 20210350057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => VERIFICATION OF HARDWARE DESIGN FOR INTEGRATED CIRCUIT IMPLEMENTING POLYNOMIAL INPUT VARIABLE FUNCTION [patent_app_type] => utility [patent_app_number] => 17/384483 [patent_app_country] => US [patent_app_date] => 2021-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23556 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17384483 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/384483
Verification of hardware design for integrated circuit implementing polynomial input variable function Jul 22, 2021 Issued
Array ( [id] => 18593764 [patent_doc_number] => 11742678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => System and a method for indicating information representing battery status of an electronic device [patent_app_type] => utility [patent_app_number] => 17/380907 [patent_app_country] => US [patent_app_date] => 2021-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4897 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17380907 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/380907
System and a method for indicating information representing battery status of an electronic device Jul 19, 2021 Issued
Array ( [id] => 19167694 [patent_doc_number] => 11983603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Holder, quantum device, and manufacturing method of quantum device [patent_app_type] => utility [patent_app_number] => 17/375943 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8267 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375943 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375943
Holder, quantum device, and manufacturing method of quantum device Jul 13, 2021 Issued
Array ( [id] => 17187561 [patent_doc_number] => 20210334446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => INTEGRATED CIRCUIT INCLUDING MISALIGNED ISOLATION PORTIONS [patent_app_type] => utility [patent_app_number] => 17/365897 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365897 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/365897
Integrated circuit including misaligned isolation portions Jun 30, 2021 Issued
Array ( [id] => 18592385 [patent_doc_number] => 11741285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/361854 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 17567 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361854 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361854
Semiconductor device and method of manufacturing the same Jun 28, 2021 Issued
Array ( [id] => 18827976 [patent_doc_number] => 11843269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-12 [patent_title] => Apparatuses and methods for removing defective energy storage cells from an energy storage array [patent_app_type] => utility [patent_app_number] => 17/361256 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3969 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361256 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361256
Apparatuses and methods for removing defective energy storage cells from an energy storage array Jun 27, 2021 Issued
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