Search

Mohammed Alam

Examiner (ID: 10623, Phone: (571)270-1507 , Office: P/2851 )

Most Active Art Unit
2851
Art Unit(s)
2825, 2851
Total Applications
1059
Issued Applications
934
Pending Applications
66
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19720704 [patent_doc_number] => 12206251 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-01-21 [patent_title] => Portable blender with wireless charging [patent_app_type] => utility [patent_app_number] => 18/476113 [patent_app_country] => US [patent_app_date] => 2023-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8803 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18476113 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/476113
Portable blender with wireless charging Sep 26, 2023 Issued
Array ( [id] => 19369770 [patent_doc_number] => 12061855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Functional circuit block harvesting in integrated circuits [patent_app_type] => utility [patent_app_number] => 18/471083 [patent_app_country] => US [patent_app_date] => 2023-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 17443 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18471083 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/471083
Functional circuit block harvesting in integrated circuits Sep 19, 2023 Issued
Array ( [id] => 19885951 [patent_doc_number] => 12271668 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-04-08 [patent_title] => Finding equivalent classes of hard defects in stacked MOSFET arrays [patent_app_type] => utility [patent_app_number] => 18/370339 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11863 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370339 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370339
Finding equivalent classes of hard defects in stacked MOSFET arrays Sep 18, 2023 Issued
Array ( [id] => 18881704 [patent_doc_number] => 20240005073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => VERIFICATION OF HARDWARE DESIGN FOR INTEGRATED CIRCUIT IMPLEMENTING POLYNOMIAL INPUT VARIABLE FUNCTION [patent_app_type] => utility [patent_app_number] => 18/369338 [patent_app_country] => US [patent_app_date] => 2023-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23569 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18369338 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/369338
Verification of hardware design for integrated circuit implementing polynomial input variable function Sep 17, 2023 Issued
Array ( [id] => 20267386 [patent_doc_number] => 12438386 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Method and circuitry to adaptively charge a battery/cell [patent_app_type] => utility [patent_app_number] => 18/457515 [patent_app_country] => US [patent_app_date] => 2023-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 54 [patent_no_of_words] => 11049 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18457515 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/457515
Method and circuitry to adaptively charge a battery/cell Aug 28, 2023 Issued
Array ( [id] => 18821736 [patent_doc_number] => 20230396077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => SYSTEM AND METHOD FOR CONTROLLING A HIGH-VOLTAGE BATTERY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/453961 [patent_app_country] => US [patent_app_date] => 2023-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6367 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18453961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/453961
SYSTEM AND METHOD FOR CONTROLLING A HIGH-VOLTAGE BATTERY SYSTEM Aug 21, 2023 Pending
Array ( [id] => 18819879 [patent_doc_number] => 20230394219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => METHOD AND SYSTEM FOR GENERATING LAYOUT DIAGRAM INCLUDING WIRING ARRANGEMENT [patent_app_type] => utility [patent_app_number] => 18/448149 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18671 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448149 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/448149
Method and system for generating layout diagram including wiring arrangement Aug 9, 2023 Issued
Array ( [id] => 19740146 [patent_doc_number] => 12216981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => System and method for generating layout diagram including wiring arrangement [patent_app_type] => utility [patent_app_number] => 18/448143 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 18378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448143 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/448143
System and method for generating layout diagram including wiring arrangement Aug 9, 2023 Issued
Array ( [id] => 18989358 [patent_doc_number] => 20240061327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => LITHOGRAPHY MASK REPAIR BY SIMULATION OF PHOTORESIST THICKNESS EVOLUTION [patent_app_type] => utility [patent_app_number] => 18/231413 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11548 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231413 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231413
Lithography mask repair by simulation of photoresist thickness evolution Aug 7, 2023 Issued
Array ( [id] => 18788235 [patent_doc_number] => 20230376666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => METHOD OF AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/362480 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362480 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362480
METHOD OF AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICE Jul 30, 2023 Pending
Array ( [id] => 18788230 [patent_doc_number] => 20230376661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => LOGIC CIRCUITS WITH REDUCED TRANSISTOR COUNTS [patent_app_type] => utility [patent_app_number] => 18/362938 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362938 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362938
Logic circuits with reduced transistor counts Jul 30, 2023 Issued
Array ( [id] => 19639071 [patent_doc_number] => 12169679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Transmission gate structure [patent_app_type] => utility [patent_app_number] => 18/362195 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 23999 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362195 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362195
Transmission gate structure Jul 30, 2023 Issued
Array ( [id] => 19841870 [patent_doc_number] => 12254260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Systems and methods for integrated circuit layout [patent_app_type] => utility [patent_app_number] => 18/361467 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10539 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361467 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361467
Systems and methods for integrated circuit layout Jul 27, 2023 Issued
Array ( [id] => 18957689 [patent_doc_number] => 20240046016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => RELAY REFLASH DETECTION AND PROPAGATION IN A BOOLEAN RELAY LOGIC ON A FPGA RELAY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/361146 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361146 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361146
RELAY REFLASH DETECTION AND PROPAGATION IN A BOOLEAN RELAY LOGIC ON A FPGA RELAY SYSTEM Jul 27, 2023 Pending
Array ( [id] => 20110469 [patent_doc_number] => 12361193 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/224337 [patent_app_country] => US [patent_app_date] => 2023-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 12595 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224337 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/224337
Semiconductor device and method of manufacturing the same Jul 19, 2023 Issued
Array ( [id] => 19734166 [patent_doc_number] => 12212172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => System and a method for indicating information representing battery status of an electronic device [patent_app_type] => utility [patent_app_number] => 18/346702 [patent_app_country] => US [patent_app_date] => 2023-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4930 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18346702 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/346702
System and a method for indicating information representing battery status of an electronic device Jul 2, 2023 Issued
Array ( [id] => 19686869 [patent_doc_number] => 20250005414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => ADIABATIC OPTICAL INTERFACES SECURED USING PHOTO-ACTIVATED LITHOGRAPHY [patent_app_type] => utility [patent_app_number] => 18/346084 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18346084 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/346084
ADIABATIC OPTICAL INTERFACES SECURED USING PHOTO-ACTIVATED LITHOGRAPHY Jun 29, 2023 Pending
Array ( [id] => 19686705 [patent_doc_number] => 20250005250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => LAYOUT DECOMPOSITION FOR OPTICAL PROXIMITY CORRECTION IN PHOTOLITHOGRAPHY MASKS [patent_app_type] => utility [patent_app_number] => 18/216475 [patent_app_country] => US [patent_app_date] => 2023-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4482 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216475 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/216475
LAYOUT DECOMPOSITION FOR OPTICAL PROXIMITY CORRECTION IN PHOTOLITHOGRAPHY MASKS Jun 28, 2023 Pending
Array ( [id] => 19459300 [patent_doc_number] => 12099792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Electromigration evaluation methodology with consideration of both self-heating and heat sink thermal effects [patent_app_type] => utility [patent_app_number] => 18/341400 [patent_app_country] => US [patent_app_date] => 2023-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 9857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341400 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/341400
Electromigration evaluation methodology with consideration of both self-heating and heat sink thermal effects Jun 25, 2023 Issued
Array ( [id] => 18883302 [patent_doc_number] => 20240006671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => BATTERY LOCKOUT OVERRIDE LOGIC FOR A BATTERY MANAGEMENT SYSTEM [patent_app_type] => utility [patent_app_number] => 18/211795 [patent_app_country] => US [patent_app_date] => 2023-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2456 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18211795 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/211795
Battery lockout override logic for a battery management system Jun 19, 2023 Issued
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