Search

Mohammed Alam

Examiner (ID: 14768, Phone: (571)270-1507 , Office: P/2851 )

Most Active Art Unit
2851
Art Unit(s)
2825, 2851
Total Applications
1044
Issued Applications
920
Pending Applications
67
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13807475 [patent_doc_number] => 10181004 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-01-15 [patent_title] => Systems and methods for identifying wires for adjustment [patent_app_type] => utility [patent_app_number] => 15/856100 [patent_app_country] => US [patent_app_date] => 2017-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3950 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15856100 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/856100
Systems and methods for identifying wires for adjustment Dec 27, 2017 Issued
Array ( [id] => 16292494 [patent_doc_number] => 10769346 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-08 [patent_title] => Method, system, and computer program product for rearrangement of objects within an electronic design [patent_app_type] => utility [patent_app_number] => 15/857561 [patent_app_country] => US [patent_app_date] => 2017-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 11996 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857561 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/857561
Method, system, and computer program product for rearrangement of objects within an electronic design Dec 27, 2017 Issued
Array ( [id] => 15146583 [patent_doc_number] => 20190351769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => MANAGEMENT DEVICE AND POWER STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 16/476376 [patent_app_country] => US [patent_app_date] => 2017-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16476376 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/476376
Management device and power storage system Dec 25, 2017 Issued
Array ( [id] => 14507117 [patent_doc_number] => 20190197213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => MODELING OF A DESIGN IN RETICLE ENHANCEMENT TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 15/853311 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16560 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15853311 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/853311
Modeling of a design in reticle enhancement technology Dec 21, 2017 Issued
Array ( [id] => 15671131 [patent_doc_number] => 10599798 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-24 [patent_title] => Double glitch capture mode power integrity analysis [patent_app_type] => utility [patent_app_number] => 15/851913 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4168 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15851913 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/851913
Double glitch capture mode power integrity analysis Dec 21, 2017 Issued
Array ( [id] => 15168105 [patent_doc_number] => 10489549 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-26 [patent_title] => Tree-routing for specific areas of an electronic design [patent_app_type] => utility [patent_app_number] => 15/852957 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 9220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15852957 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/852957
Tree-routing for specific areas of an electronic design Dec 21, 2017 Issued
Array ( [id] => 14523971 [patent_doc_number] => 10339248 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Modified design rules to improve device performance [patent_app_type] => utility [patent_app_number] => 15/848333 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4945 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15848333 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/848333
Modified design rules to improve device performance Dec 19, 2017 Issued
Array ( [id] => 17456544 [patent_doc_number] => 11271414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Interchangeably connectable charging cradle, battery pack and mobile device [patent_app_type] => utility [patent_app_number] => 16/476927 [patent_app_country] => US [patent_app_date] => 2017-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 5984 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16476927 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/476927
Interchangeably connectable charging cradle, battery pack and mobile device Dec 14, 2017 Issued
Array ( [id] => 17309327 [patent_doc_number] => 11210443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Distributed programmable delay lines in a clock tree [patent_app_type] => utility [patent_app_number] => 15/841064 [patent_app_country] => US [patent_app_date] => 2017-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 9842 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15841064 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/841064
Distributed programmable delay lines in a clock tree Dec 12, 2017 Issued
Array ( [id] => 15517499 [patent_doc_number] => 10565338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Equivalency verification for hierarchical references [patent_app_type] => utility [patent_app_number] => 15/840064 [patent_app_country] => US [patent_app_date] => 2017-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6675 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15840064 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/840064
Equivalency verification for hierarchical references Dec 12, 2017 Issued
Array ( [id] => 15671137 [patent_doc_number] => 10599801 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Semiconductor circuit design device [patent_app_type] => utility [patent_app_number] => 15/839483 [patent_app_country] => US [patent_app_date] => 2017-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5895 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15839483 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/839483
Semiconductor circuit design device Dec 11, 2017 Issued
Array ( [id] => 14444241 [patent_doc_number] => 20190179994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => HIERARCHICAL TRIM MANAGEMENT FOR SELF-ALIGNED DOUBLE PATTERNING [patent_app_type] => utility [patent_app_number] => 15/838520 [patent_app_country] => US [patent_app_date] => 2017-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10439 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15838520 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/838520
Hierarchical trim management for self-aligned double patterning Dec 11, 2017 Issued
Array ( [id] => 15401761 [patent_doc_number] => 10541545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-21 [patent_title] => Apparatuses and methods for removing defective energy storage cells from an energy storage array [patent_app_type] => utility [patent_app_number] => 15/839506 [patent_app_country] => US [patent_app_date] => 2017-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3920 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15839506 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/839506
Apparatuses and methods for removing defective energy storage cells from an energy storage array Dec 11, 2017 Issued
Array ( [id] => 12820684 [patent_doc_number] => 20180165400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => Method and Computer Program for Determining a Placement of at least one Circuit for a Reconfigurable Logic Device [patent_app_type] => utility [patent_app_number] => 15/837124 [patent_app_country] => US [patent_app_date] => 2017-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 34962 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15837124 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/837124
Method and computer program for determining a placement of at least one circuit for a reconfigurable logic device Dec 10, 2017 Issued
Array ( [id] => 15031533 [patent_doc_number] => 20190326771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => HAND-HELD POWER TOOL SYSTEM [patent_app_type] => utility [patent_app_number] => 16/470907 [patent_app_country] => US [patent_app_date] => 2017-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4479 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16470907 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/470907
HAND-HELD POWER TOOL SYSTEM Dec 7, 2017 Abandoned
Array ( [id] => 18304826 [patent_doc_number] => 11626743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Battery tool connection interface [patent_app_type] => utility [patent_app_number] => 16/770132 [patent_app_country] => US [patent_app_date] => 2017-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7473 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16770132 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/770132
Battery tool connection interface Dec 5, 2017 Issued
Array ( [id] => 12243779 [patent_doc_number] => 20180076643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-15 [patent_title] => 'Current Sense Apparatus for Battery Charger Systems' [patent_app_type] => utility [patent_app_number] => 15/819005 [patent_app_country] => US [patent_app_date] => 2017-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15819005 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/819005
Current sense apparatus for battery charger systems Nov 20, 2017 Issued
Array ( [id] => 12242306 [patent_doc_number] => 20180075170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-15 [patent_title] => 'DYNAMIC FAULT MODEL GENERATION FOR DIAGNOSTICS SIMULATION AND PATTERN GENERATION' [patent_app_type] => utility [patent_app_number] => 15/813280 [patent_app_country] => US [patent_app_date] => 2017-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15813280 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/813280
Dynamic fault model generation for diagnostics simulation and pattern generation Nov 14, 2017 Issued
Array ( [id] => 17250708 [patent_doc_number] => 11186178 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-30 [patent_title] => Monitoring system, server, terminal device, monitoring method, and storage medium [patent_app_type] => utility [patent_app_number] => 16/462315 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 14117 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16462315 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/462315
Monitoring system, server, terminal device, monitoring method, and storage medium Nov 13, 2017 Issued
Array ( [id] => 15013301 [patent_doc_number] => 10452798 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-22 [patent_title] => System, method, and computer program product for filtering one or more failures in a formal verification [patent_app_type] => utility [patent_app_number] => 15/808094 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4864 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15808094 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/808094
System, method, and computer program product for filtering one or more failures in a formal verification Nov 8, 2017 Issued
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