Search

Mohammed Alam

Examiner (ID: 10623, Phone: (571)270-1507 , Office: P/2851 )

Most Active Art Unit
2851
Art Unit(s)
2825, 2851
Total Applications
1059
Issued Applications
934
Pending Applications
66
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19443360 [patent_doc_number] => 12093629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Method of manufacturing semiconductor device and system for same [patent_app_type] => utility [patent_app_number] => 18/335505 [patent_app_country] => US [patent_app_date] => 2023-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 16839 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18335505 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/335505
Method of manufacturing semiconductor device and system for same Jun 14, 2023 Issued
Array ( [id] => 19460465 [patent_doc_number] => 12100981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Power tool system having receptacle for wireless communication adapter [patent_app_type] => utility [patent_app_number] => 18/208958 [patent_app_country] => US [patent_app_date] => 2023-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 47 [patent_no_of_words] => 30110 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18208958 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/208958
Power tool system having receptacle for wireless communication adapter Jun 12, 2023 Issued
Array ( [id] => 19779830 [patent_doc_number] => 12228862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Selection of measurement locations for patterning processes [patent_app_type] => utility [patent_app_number] => 18/207732 [patent_app_country] => US [patent_app_date] => 2023-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15834 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18207732 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/207732
Selection of measurement locations for patterning processes Jun 8, 2023 Issued
Array ( [id] => 19398792 [patent_doc_number] => 12073160 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-08-27 [patent_title] => Dynamic voltage drop model for timing analysis [patent_app_type] => utility [patent_app_number] => 18/208224 [patent_app_country] => US [patent_app_date] => 2023-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7696 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18208224 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/208224
Dynamic voltage drop model for timing analysis Jun 8, 2023 Issued
Array ( [id] => 19596018 [patent_doc_number] => 12153866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Modular periphery tile for integrated circuit device [patent_app_type] => utility [patent_app_number] => 18/327045 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18327045 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/327045
Modular periphery tile for integrated circuit device May 30, 2023 Issued
Array ( [id] => 19596019 [patent_doc_number] => 12153867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Reduced-power dynamic data circuits with wide-band energy recovery [patent_app_type] => utility [patent_app_number] => 18/204230 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 8240 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18204230 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/204230
Reduced-power dynamic data circuits with wide-band energy recovery May 30, 2023 Issued
Array ( [id] => 19313431 [patent_doc_number] => 12039246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Circuit layout [patent_app_type] => utility [patent_app_number] => 18/325501 [patent_app_country] => US [patent_app_date] => 2023-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7213 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18325501 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/325501
Circuit layout May 29, 2023 Issued
Array ( [id] => 18881823 [patent_doc_number] => 20240005192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => METHOD AND APPARATUS FOR FABRICATING QUANTUM CIRCUIT, DEVICE, MEDIUM, AND PRODUCT [patent_app_type] => utility [patent_app_number] => 18/202209 [patent_app_country] => US [patent_app_date] => 2023-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8689 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18202209 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/202209
METHOD AND APPARATUS FOR FABRICATING QUANTUM CIRCUIT, DEVICE, MEDIUM, AND PRODUCT May 24, 2023 Pending
Array ( [id] => 19466739 [patent_doc_number] => 20240320409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SCAN WRAPPER CIRCUIT AND WRAPPER CELLS [patent_app_type] => utility [patent_app_number] => 18/318819 [patent_app_country] => US [patent_app_date] => 2023-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18318819 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/318819
SCAN WRAPPER CIRCUIT AND WRAPPER CELLS May 16, 2023 Pending
Array ( [id] => 19487513 [patent_doc_number] => 12107240 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Smart battery management systems [patent_app_type] => utility [patent_app_number] => 18/198268 [patent_app_country] => US [patent_app_date] => 2023-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 17551 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18198268 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/198268
Smart battery management systems May 15, 2023 Issued
Array ( [id] => 19267961 [patent_doc_number] => 20240211665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => INTEGRATED CIRCUIT GENERATOR USING A PROVIDER [patent_app_type] => utility [patent_app_number] => 18/197422 [patent_app_country] => US [patent_app_date] => 2023-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9332 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18197422 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/197422
INTEGRATED CIRCUIT GENERATOR USING A PROVIDER May 14, 2023 Pending
Array ( [id] => 18773112 [patent_doc_number] => 20230367941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => DOSE MAPPING USING SUBSTRATE CURVATURE TO COMPENSATE FOR OUT-OF-PLANE DISTORTION [patent_app_type] => utility [patent_app_number] => 18/144832 [patent_app_country] => US [patent_app_date] => 2023-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4893 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18144832 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/144832
DOSE MAPPING USING SUBSTRATE CURVATURE TO COMPENSATE FOR OUT-OF-PLANE DISTORTION May 7, 2023 Pending
Array ( [id] => 20717380 [patent_doc_number] => 12632631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Making circuitry having an attribute [patent_app_type] => utility [patent_app_number] => 18/142087 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4696 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142087 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142087
Making circuitry having an attribute May 1, 2023 Issued
Array ( [id] => 18742107 [patent_doc_number] => 20230351089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => USING A MACHINE TRAINED NETWORK DURING ROUTING TO ACCOUNT FOR OPC COST [patent_app_type] => utility [patent_app_number] => 18/142501 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142501 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142501
USING A MACHINE TRAINED NETWORK DURING ROUTING TO ACCOUNT FOR OPC COST May 1, 2023 Pending
Array ( [id] => 18811177 [patent_doc_number] => 20230385513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => USING MACHINE TRAINED NETWORK DURING ROUTING TO PERFORM PARASITIC EXTRACTION FOR AN IC DESIGN [patent_app_type] => utility [patent_app_number] => 18/142482 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26856 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142482 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142482
USING MACHINE TRAINED NETWORK DURING ROUTING TO PERFORM PARASITIC EXTRACTION FOR AN IC DESIGN May 1, 2023 Pending
Array ( [id] => 18811178 [patent_doc_number] => 20230385514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => USING MACHINE TRAINED NETWORK DURING ROUTING TO MODIFY LOCATIONS OF VIAS IN AN IC DESIGN [patent_app_type] => utility [patent_app_number] => 18/142483 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26857 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142483 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142483
USING MACHINE TRAINED NETWORK DURING ROUTING TO MODIFY LOCATIONS OF VIAS IN AN IC DESIGN May 1, 2023 Pending
Array ( [id] => 19129731 [patent_doc_number] => 20240135084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => OPTIMIZING MACHINE LEARNING CLASSIFICATION MODELS FOR RESOURCE CONSTRAINTS IN ELECTRONIC DESIGN AUTOMATION (EDA) COMPUTER AIDED DESIGN (CAD) FLOWS [patent_app_type] => utility [patent_app_number] => 18/141257 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9459 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18141257 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/141257
OPTIMIZING MACHINE LEARNING CLASSIFICATION MODELS FOR RESOURCE CONSTRAINTS IN ELECTRONIC DESIGN AUTOMATION (EDA) COMPUTER AIDED DESIGN (CAD) FLOWS Apr 27, 2023 Pending
Array ( [id] => 20680940 [patent_doc_number] => 20260119764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => THERMAL AWARE TIMING ANALYSIS [patent_app_type] => utility [patent_app_number] => 18/309549 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1276 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18309549 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/309549
THERMAL AWARE TIMING ANALYSIS Apr 27, 2023 Pending
Array ( [id] => 18725178 [patent_doc_number] => 20230339343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => SYSTEMS AND METHODS FOR CHARGING ELECTRIC VEHICLES AND TRAILERS [patent_app_type] => utility [patent_app_number] => 18/137908 [patent_app_country] => US [patent_app_date] => 2023-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18137908 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/137908
SYSTEMS AND METHODS FOR CHARGING ELECTRIC VEHICLES AND TRAILERS Apr 20, 2023 Pending
Array ( [id] => 18728241 [patent_doc_number] => 20230342534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => MACHINE LEARNING BASED PROCESSING OF DESIGN FILES FOR ELECTRONICS HARDWARE DESIGN [patent_app_type] => utility [patent_app_number] => 18/301139 [patent_app_country] => US [patent_app_date] => 2023-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18301139 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/301139
MACHINE LEARNING BASED PROCESSING OF DESIGN FILES FOR ELECTRONICS HARDWARE DESIGN Apr 13, 2023 Pending
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