
Mohammed Alam
Examiner (ID: 10623, Phone: (571)270-1507 , Office: P/2851 )
| Most Active Art Unit | 2851 |
| Art Unit(s) | 2825, 2851 |
| Total Applications | 1059 |
| Issued Applications | 934 |
| Pending Applications | 66 |
| Abandoned Applications | 73 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11360670
[patent_doc_number] => 09537332
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-03
[patent_title] => 'Apparatus, system and method for charge balancing of individual batteries in a string of batteries using battery voltage and temperature, and detecting and preventing thermal runaway'
[patent_app_type] => utility
[patent_app_number] => 14/292538
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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Array
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[patent_doc_number] => 20150349573
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[patent_kind] => A1
[patent_issue_date] => 2015-12-03
[patent_title] => 'Single Stage Rectification and Regulation for Wireless Charging Systems'
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Array
(
[id] => 13018883
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[patent_issue_date] => 2018-07-24
[patent_title] => Tuning of primary and secondary resonant frequency for improved efficiency of inductive power transfer
[patent_app_type] => utility
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Array
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[patent_title] => 'PHYSICAL AWARE TECHNOLOGY MAPPING IN SYNTHESIS'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/288794 | Physical aware technology mapping in synthesis | May 27, 2014 | Issued |
Array
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[patent_title] => 'Stitch-derived via structures and methods of generating the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/285719 | Stitch-derived via structures and methods of generating the same | May 22, 2014 | Issued |
Array
(
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[patent_doc_number] => 20150178417
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[patent_issue_date] => 2015-06-25
[patent_title] => 'METHOD FOR SHOWING HIERARCHICAL STRUCTURE FOR A GIVEN POWER INTENT DESCRIBED IN A POWER INTENT DESCRIPTION LANGUAGE WITH A DESIGN DESCRIBED IN A HARDWARE DESIGN DESCRIPTION LANGUAGE, AND ASSOCIATED APPARATUS AND ASSOCIATED COMPUTER PROGRAM PRODUCT'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/284411 | Method for showing hierarchical structure for a given power intent described in a power intent description language with a design described in a hardware design description language, and associated apparatus and associated computer program product | May 21, 2014 | Issued |
Array
(
[id] => 9723258
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[patent_issue_date] => 2014-09-11
[patent_title] => 'SUPPORT TECHNIQUE'
[patent_app_type] => utility
[patent_app_number] => 14/284463
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/284463 | SUPPORT TECHNIQUE | May 21, 2014 | Abandoned |
Array
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[patent_issue_date] => 2015-10-01
[patent_title] => 'LOGIC ANALYZER CIRCUIT FOR PROGRAMMABLE LOGIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/283454
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[patent_app_date] => 2014-05-21
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/283454 | Logic analyzer circuit for programmable logic device | May 20, 2014 | Issued |
Array
(
[id] => 13651875
[patent_doc_number] => 09852253
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[patent_issue_date] => 2017-12-26
[patent_title] => Automated layout for integrated circuits with nonstandard cells
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/891659 | Automated layout for integrated circuits with nonstandard cells | May 18, 2014 | Issued |
Array
(
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[patent_title] => 'Support apparatus, design support method, and recording medium'
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Array
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[patent_title] => 'Verification support method, recording medium having stored verification support program therein, and verification support apparatus'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/276493 | Verification support method, recording medium having stored verification support program therein, and verification support apparatus | May 12, 2014 | Issued |
Array
(
[id] => 10932610
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[patent_title] => 'SEMICONDUCTOR DEFECT CHARACTERIZATION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/271331 | Semiconductor defect characterization | May 5, 2014 | Issued |
Array
(
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Array
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/253784 | Systems and methods for increasing debugging visibility of prototyping systems | Apr 14, 2014 | Issued |