Search

Mohammed Alam

Examiner (ID: 10623, Phone: (571)270-1507 , Office: P/2851 )

Most Active Art Unit
2851
Art Unit(s)
2825, 2851
Total Applications
1059
Issued Applications
934
Pending Applications
66
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
13/870263 Cloud-Basd Digital Verification System and Method Apr 24, 2013 Abandoned
Array ( [id] => 9968011 [patent_doc_number] => 09015646 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-21 [patent_title] => 'System, method, and computer program product for translating a hardware language into a source database' [patent_app_type] => utility [patent_app_number] => 13/860463 [patent_app_country] => US [patent_app_date] => 2013-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 16353 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13860463 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/860463
System, method, and computer program product for translating a hardware language into a source database Apr 9, 2013 Issued
Array ( [id] => 9191660 [patent_doc_number] => 20130330975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'CABLELESS BATTERY INTEGRATION' [patent_app_type] => utility [patent_app_number] => 13/854820 [patent_app_country] => US [patent_app_date] => 2013-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13854820 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/854820
Cableless battery integration Mar 31, 2013 Issued
Array ( [id] => 9746612 [patent_doc_number] => 20140282331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'UNIVERSAL DESIGN LAYOUT COMPLIANCE' [patent_app_type] => utility [patent_app_number] => 13/852080 [patent_app_country] => US [patent_app_date] => 2013-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13852080 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/852080
Universal design layout compliance Mar 27, 2013 Issued
Array ( [id] => 9652370 [patent_doc_number] => 08806406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Active net and parasitic net based approach for circuit simulation and characterization' [patent_app_type] => utility [patent_app_number] => 13/850120 [patent_app_country] => US [patent_app_date] => 2013-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5689 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13850120 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/850120
Active net and parasitic net based approach for circuit simulation and characterization Mar 24, 2013 Issued
Array ( [id] => 9571907 [patent_doc_number] => 20140189620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'NETLIST ABSTRACTION' [patent_app_type] => utility [patent_app_number] => 13/849430 [patent_app_country] => US [patent_app_date] => 2013-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4197 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13849430 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/849430
Netlist abstraction Mar 21, 2013 Issued
Array ( [id] => 9611794 [patent_doc_number] => 08788983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Method for correcting layout pattern and mask thereof' [patent_app_type] => utility [patent_app_number] => 13/845149 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5053 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13845149 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/845149
Method for correcting layout pattern and mask thereof Mar 17, 2013 Issued
Array ( [id] => 10562749 [patent_doc_number] => 09286427 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-15 [patent_title] => 'System and method for netlist extraction and circuit simulation' [patent_app_type] => utility [patent_app_number] => 13/838926 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 16984 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13838926 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/838926
System and method for netlist extraction and circuit simulation Mar 14, 2013 Issued
Array ( [id] => 9695581 [patent_doc_number] => 08826211 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-09-02 [patent_title] => 'Graphical user interface for physically aware clock tree planning' [patent_app_type] => utility [patent_app_number] => 13/839769 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 10067 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13839769 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/839769
Graphical user interface for physically aware clock tree planning Mar 14, 2013 Issued
Array ( [id] => 9733311 [patent_doc_number] => 20140269020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'SYSTEM AND METHOD TO REGULATE OPERATING VOLTAGE OF A MEMORY ARRAY' [patent_app_type] => utility [patent_app_number] => 13/842263 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8654 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13842263 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/842263
System and method to regulate operating voltage of a memory array Mar 14, 2013 Issued
Array ( [id] => 9746616 [patent_doc_number] => 20140282335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'PHASE DETERMINATION FOR EXTRACTION FROM SCATTERING PARAMETERS' [patent_app_type] => utility [patent_app_number] => 13/832460 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4569 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13832460 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/832460
Phase determination for extraction from scattering parameters Mar 14, 2013 Issued
Array ( [id] => 10562754 [patent_doc_number] => 09286432 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-15 [patent_title] => 'Methods, systems, and articles of manufacture for implementing correct-by-construction physical designs with multiple-patterning-awareness' [patent_app_type] => utility [patent_app_number] => 13/840717 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 21 [patent_no_of_words] => 13721 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13840717 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/840717
Methods, systems, and articles of manufacture for implementing correct-by-construction physical designs with multiple-patterning-awareness Mar 14, 2013 Issued
Array ( [id] => 9746604 [patent_doc_number] => 20140282323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'PARAMETERIZED CELL FOR PLANAR AND FINFET TECHNOLOGY DESIGN' [patent_app_type] => utility [patent_app_number] => 13/836057 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3663 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13836057 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/836057
Parameterized cell for planar and finFET technology design Mar 14, 2013 Issued
Array ( [id] => 9723260 [patent_doc_number] => 20140258961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'Stretch Dummy Cell Insertion in FinFET Process' [patent_app_type] => utility [patent_app_number] => 13/833958 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3328 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13833958 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/833958
Stretch dummy cell insertion in FinFET process Mar 14, 2013 Issued
Array ( [id] => 9886135 [patent_doc_number] => 08972921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Symmetric placement of components on a chip to reduce crosstalk induced by chip modes' [patent_app_type] => utility [patent_app_number] => 13/827706 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2682 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13827706 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/827706
Symmetric placement of components on a chip to reduce crosstalk induced by chip modes Mar 13, 2013 Issued
Array ( [id] => 9871672 [patent_doc_number] => 08959464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-17 [patent_title] => 'Multi-etch process using material-specific behavioral parameters in 3-D virtual fabrication environment' [patent_app_type] => utility [patent_app_number] => 13/831450 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 43 [patent_no_of_words] => 13920 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13831450 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/831450
Multi-etch process using material-specific behavioral parameters in 3-D virtual fabrication environment Mar 13, 2013 Issued
Array ( [id] => 9968007 [patent_doc_number] => 09015642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-21 [patent_title] => 'Hybrid method for performing full field optical proximity correction for finfet mandrel layer' [patent_app_type] => utility [patent_app_number] => 13/803293 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 2618 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13803293 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/803293
Hybrid method for performing full field optical proximity correction for finfet mandrel layer Mar 13, 2013 Issued
Array ( [id] => 9328309 [patent_doc_number] => 20140055091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'CHARGER AND CHARGING METHOD' [patent_app_type] => utility [patent_app_number] => 13/984798 [patent_app_country] => US [patent_app_date] => 2013-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2819 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13984798 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/984798
Charger and charging method Mar 5, 2013 Issued
Array ( [id] => 8918224 [patent_doc_number] => 20130179849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'Automated Circuit Design For Generation of Stability Constraints for Generically Defined Electronic System with Feedback' [patent_app_type] => utility [patent_app_number] => 13/784626 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5652 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13784626 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/784626
Automated circuit design for generation of stability constraints for generically defined electronic system with feedback Mar 3, 2013 Issued
Array ( [id] => 9038832 [patent_doc_number] => 20130241470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'UNIVERSAL DOCK FOR PORTABLE PHONE' [patent_app_type] => utility [patent_app_number] => 13/771954 [patent_app_country] => US [patent_app_date] => 2013-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4729 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13771954 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/771954
Universal dock for portable phone Feb 19, 2013 Issued
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