Search

Mohammed Alam

Examiner (ID: 10623, Phone: (571)270-1507 , Office: P/2851 )

Most Active Art Unit
2851
Art Unit(s)
2825, 2851
Total Applications
1059
Issued Applications
934
Pending Applications
66
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18415125 [patent_doc_number] => 11669668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Method for comprehensive integration verification of mixed-signal circuits [patent_app_type] => utility [patent_app_number] => 17/722445 [patent_app_country] => US [patent_app_date] => 2022-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5163 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17722445 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/722445
Method for comprehensive integration verification of mixed-signal circuits Apr 17, 2022 Issued
Array ( [id] => 20773690 [patent_doc_number] => 12657367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Integrated circuit using multiple and different process corners [patent_app_type] => utility [patent_app_number] => 17/722009 [patent_app_country] => US [patent_app_date] => 2022-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3690 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17722009 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/722009
Integrated circuit using multiple and different process corners Apr 14, 2022 Issued
Array ( [id] => 20273998 [patent_doc_number] => 12443781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Integrated thermal-electrical co-simulation [patent_app_type] => utility [patent_app_number] => 17/716527 [patent_app_country] => US [patent_app_date] => 2022-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 0 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17716527 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/716527
Integrated thermal-electrical co-simulation Apr 7, 2022 Issued
Array ( [id] => 20188943 [patent_doc_number] => 12400058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Method, system, medium and program for clock design of physical partition structure [patent_app_type] => utility [patent_app_number] => 17/709359 [patent_app_country] => US [patent_app_date] => 2022-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 8951 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17709359 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/709359
Method, system, medium and program for clock design of physical partition structure Mar 29, 2022 Issued
Array ( [id] => 18212395 [patent_doc_number] => 20230058659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => WIRELESS CHARGING TABLE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/656995 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9625 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17656995 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/656995
WIRELESS CHARGING TABLE AND METHOD FOR MANUFACTURING THE SAME Mar 28, 2022 Abandoned
Array ( [id] => 17950052 [patent_doc_number] => 20220337071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => INTEGRATED CHARGING DEVICE, CHARGING PILE AND METHOD FOR CONTROLLING CHARGING PILE [patent_app_type] => utility [patent_app_number] => 17/706439 [patent_app_country] => US [patent_app_date] => 2022-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8537 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17706439 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/706439
Integrated charging device, charging pile and method for controlling charging pile Mar 27, 2022 Issued
Array ( [id] => 20304422 [patent_doc_number] => 12450415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Library design and co-optimization with a circuit design [patent_app_type] => utility [patent_app_number] => 17/705137 [patent_app_country] => US [patent_app_date] => 2022-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 3438 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17705137 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/705137
Library design and co-optimization with a circuit design Mar 24, 2022 Issued
Array ( [id] => 17722429 [patent_doc_number] => 20220215151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => ELECTROMIGRATION EVALUATION METHODOLOGY WITH CONSIDERATION OF BOTH SELF-HEATING AND HEAT SINK THERMAL EFFECTS [patent_app_type] => utility [patent_app_number] => 17/702625 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10156 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17702625 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/702625
Electromigration evaluation methodology with consideration of both self-heating and heat sink thermal effects Mar 22, 2022 Issued
Array ( [id] => 20240348 [patent_doc_number] => 12420654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Mount for a charging station [patent_app_type] => utility [patent_app_number] => 17/701282 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17701282 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/701282
Mount for a charging station Mar 21, 2022 Issued
Array ( [id] => 19872909 [patent_doc_number] => 12265771 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Method for dividing simulation models up between a processor and an FPGA [patent_app_type] => utility [patent_app_number] => 17/697095 [patent_app_country] => US [patent_app_date] => 2022-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 7541 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17697095 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/697095
Method for dividing simulation models up between a processor and an FPGA Mar 16, 2022 Issued
Array ( [id] => 18532156 [patent_doc_number] => 20230237228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => COMPUTER READABLE RECORDING MEDIUM WITH STORED PROGRAM AND METHOD OF EXTRACTING PARASITIC PARAMETERS OF A 3D IC THEREOF [patent_app_type] => utility [patent_app_number] => 17/691127 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2994 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17691127 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/691127
Computer readable recording medium with stored program and method of extracting parasitic parameters of a 3D IC thereof Mar 9, 2022 Issued
Array ( [id] => 18622762 [patent_doc_number] => 11755807 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Method for predicting delay at multiple corners for digital integrated circuit [patent_app_type] => utility [patent_app_number] => 18/010131 [patent_app_country] => US [patent_app_date] => 2022-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5714 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 355 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18010131 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/010131
Method for predicting delay at multiple corners for digital integrated circuit Mar 8, 2022 Issued
Array ( [id] => 18561941 [patent_doc_number] => 11727187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Transmission gate manufacturing method [patent_app_type] => utility [patent_app_number] => 17/689825 [patent_app_country] => US [patent_app_date] => 2022-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 24151 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17689825 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/689825
Transmission gate manufacturing method Mar 7, 2022 Issued
Array ( [id] => 19778084 [patent_doc_number] => 12227105 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Method for determining a derating factor, a control unit, a power system and a vehicle [patent_app_type] => utility [patent_app_number] => 17/653381 [patent_app_country] => US [patent_app_date] => 2022-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5324 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17653381 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/653381
Method for determining a derating factor, a control unit, a power system and a vehicle Mar 2, 2022 Issued
Array ( [id] => 18614628 [patent_doc_number] => 20230281365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => NETLIST DESIGN FOR POST SILICON LOCAL CLOCK CONTROLLER TIMING IMPROVEMENT [patent_app_type] => utility [patent_app_number] => 17/684451 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17684451 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/684451
Netlist design for post silicon local clock controller timing improvement Mar 1, 2022 Issued
Array ( [id] => 17659571 [patent_doc_number] => 20220180036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => METHODS FOR MODELING OF A DESIGN IN RETICLE ENHANCEMENT TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 17/652881 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21565 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17652881 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/652881
Methods for modeling of a design in reticle enhancement technology Feb 27, 2022 Issued
Array ( [id] => 19933973 [patent_doc_number] => 12307178 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Structural analysis for determining fault types in safety related logic [patent_app_type] => utility [patent_app_number] => 17/680226 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9383 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17680226 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/680226
Structural analysis for determining fault types in safety related logic Feb 23, 2022 Issued
Array ( [id] => 17882088 [patent_doc_number] => 20220297565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => CHARGING CONTROL APPARATUS, MOVING BODY, CHARGING CONTROL SYSTEM, AND CHARGING CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 17/677942 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12336 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17677942 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/677942
Charging control apparatus, moving body, charging control system, and charging control method Feb 21, 2022 Issued
Array ( [id] => 18569344 [patent_doc_number] => 20230259680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => STANDARD CELL CHARACTERIZATION FOR INTERNAL CONDUCTIVE LINE OF CELL [patent_app_type] => utility [patent_app_number] => 17/671979 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17671979 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/671979
Standard cell characterization for internal conductive line of cell Feb 14, 2022 Issued
Array ( [id] => 17866325 [patent_doc_number] => 20220289060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => CONTROL SYSTEM AND ENERGY MANAGEMENT METHOD [patent_app_type] => utility [patent_app_number] => 17/671754 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17671754 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/671754
Control system and energy management method Feb 14, 2022 Issued
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