Mohammed H. Rehman

Array ( [id] => 14750261 [patent_doc_number] => 20190258304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => Communication Network Performance Monitoring and Power Backup [patent_app_type] => utility [patent_app_number] => 16/176183 [patent_app_country] => US [patent_app_date] => 2018-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9249 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16176183 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16322806 [patent_doc_number] => 10782767 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-22 [patent_title] => System, method, and computer program product for clock gating in a formal verification [patent_app_type] => utility [patent_app_number] => 16/176645 [patent_app_country] => US [patent_app_date] => 2018-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5261 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16176645 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13933435 [patent_doc_number] => 20190050233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => ELECTRONIC DEVICE, METHOD FOR CONTROLLING ELECTRONIC DEVICE, AND PROGRAM [patent_app_type] => utility [patent_app_number] => 16/159432 [patent_app_country] => US [patent_app_date] => 2018-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10968 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16159432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15215565 [patent_doc_number] => 20190370469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => External Trust Cache [patent_app_type] => utility [patent_app_number] => 16/147712 [patent_app_country] => US [patent_app_date] => 2018-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147712 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13905239 [patent_doc_number] => 20190041824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => SCALABLE EDGE COMPUTE IN A DISTRIBUTED CONTROL ENVIRONMENT [patent_app_type] => utility [patent_app_number] => 16/147148 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16745 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147148 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16683085 [patent_doc_number] => 10942562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Methods and apparatus to manage operation of variable-state computing devices using artificial intelligence [patent_app_type] => utility [patent_app_number] => 16/146454 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 13429 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146454 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17394585 [patent_doc_number] => 11243597 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-08 [patent_title] => Microprocessor power logging at a sub-process level [patent_app_type] => utility [patent_app_number] => 16/147132 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 10464 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147132 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13844829 [patent_doc_number] => 20190025899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => RECORDING MEDIUM, ARRANGEMENT SEARCH METHOD, AND ARRANGEMENT SEARCHING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/140001 [patent_app_country] => US [patent_app_date] => 2018-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16140001 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15684797 [patent_doc_number] => 20200097062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => EFFICIENT POWER MANAGEMENT STAND-BY MODES FOR MULTIPLE DIES IN A STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/140448 [patent_app_country] => US [patent_app_date] => 2018-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16140448 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13875777 [patent_doc_number] => 20190034229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => Scheduling Method and Electronic Device [patent_app_type] => utility [patent_app_number] => 16/139817 [patent_app_country] => US [patent_app_date] => 2018-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14355 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16139817 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16833683 [patent_doc_number] => 11009934 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Application ramp rate control in large installations [patent_app_type] => utility [patent_app_number] => 16/136218 [patent_app_country] => US [patent_app_date] => 2018-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3962 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16136218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17572620 [patent_doc_number] => 11320888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => All-digital closed loop voltage generator [patent_app_type] => utility [patent_app_number] => 16/124071 [patent_app_country] => US [patent_app_date] => 2018-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7112 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16124071 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15593843 [patent_doc_number] => 20200073456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => ADJUSTING A POWER LIMIT IN RESPONSE TO A TEMPERATURE DIFFERENCE [patent_app_type] => utility [patent_app_number] => 16/118790 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6278 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118790 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14723959 [patent_doc_number] => 20190253043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => SYSTEM ON CHIP PERFORMING CLOCK TRAINING AND COMPUTING SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/112921 [patent_app_country] => US [patent_app_date] => 2018-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6652 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16112921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16129425 [patent_doc_number] => 10698471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Information processing apparatus and information processing method [patent_app_type] => utility [patent_app_number] => 16/113925 [patent_app_country] => US [patent_app_date] => 2018-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9938 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16113925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13993189 [patent_doc_number] => 20190065752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => System And Method For Booting Within A Heterogeneous Memory Environment [patent_app_type] => utility [patent_app_number] => 16/107956 [patent_app_country] => US [patent_app_date] => 2018-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16107956 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14719255 [patent_doc_number] => 20190250691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => MOBILE DEVICE INCLUDING CONTEXT HUB AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/107970 [patent_app_country] => US [patent_app_date] => 2018-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16107970 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15532049 [patent_doc_number] => 20200058330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => CLIENT LATENCY-AWARE MICRO-IDLE MEMORY POWER MANAGEMENT [patent_app_type] => utility [patent_app_number] => 16/103319 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103319 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14839893 [patent_doc_number] => 20190278347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => DELIVERY OF AC POWER WITH HIGHER POWER PoE (POWER OVER ETHERNET) SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/040745 [patent_app_country] => US [patent_app_date] => 2018-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5457 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16040745 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15412367 [patent_doc_number] => 20200026506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => RUNTIME UPDATE OF INTEL SERVER PLATFORM SERVICES' NODE MANAGER SETTINGS IN BIOS EEPROM [patent_app_type] => utility [patent_app_number] => 16/041186 [patent_app_country] => US [patent_app_date] => 2018-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4078 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16041186 [rel_patent_id] =>[rel_patent_doc_number] =>)