Search

Mohammed R. Alam

Examiner (ID: 4049, Phone: (571)272-1564 , Office: P/2828 )

Most Active Art Unit
2828
Art Unit(s)
2823, 2897, 2828
Total Applications
795
Issued Applications
679
Pending Applications
70
Abandoned Applications
64

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19584146 [patent_doc_number] => 12150293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Bit line structure, manufacturing method thereof and semiconductor memory [patent_app_type] => utility [patent_app_number] => 17/386765 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4399 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17386765 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/386765
Bit line structure, manufacturing method thereof and semiconductor memory Jul 27, 2021 Issued
Array ( [id] => 17217987 [patent_doc_number] => 20210351325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => LED DISPLAY, METHOD FOR REPAIRING THE SAME, AND LED CHIP [patent_app_type] => utility [patent_app_number] => 17/382971 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3847 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382971 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382971
LED DISPLAY, METHOD FOR REPAIRING THE SAME, AND LED CHIP Jul 21, 2021 Abandoned
Array ( [id] => 17217893 [patent_doc_number] => 20210351231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => LED DISPLAY APPARATUS, MASS TRANSFER METHOD, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/382840 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382840 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382840
LED DISPLAY APPARATUS, MASS TRANSFER METHOD, AND STORAGE MEDIUM Jul 21, 2021 Abandoned
Array ( [id] => 18797107 [patent_doc_number] => 11830944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/380682 [patent_app_country] => US [patent_app_date] => 2021-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 7679 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 359 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17380682 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/380682
Semiconductor device and method of manufacturing the same Jul 19, 2021 Issued
Array ( [id] => 18143962 [patent_doc_number] => 20230017813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => CONDUCTIVE LAYERS IN MEMORY ARRAY REGION AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/379794 [patent_app_country] => US [patent_app_date] => 2021-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17379794 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/379794
Conductive layers in memory array region and methods for forming the same Jul 18, 2021 Issued
Array ( [id] => 18144821 [patent_doc_number] => 20230018673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => RADIO FREQUENCY DEVICES WITH PHOTO-IMAGEABLE POLYMERS AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 17/377755 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7525 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17377755 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/377755
Radio frequency devices with photo-imageable polymers and related methods Jul 15, 2021 Issued
Array ( [id] => 17630815 [patent_doc_number] => 20220165830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/377278 [patent_app_country] => US [patent_app_date] => 2021-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17377278 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/377278
Display device Jul 14, 2021 Issued
Array ( [id] => 17978800 [patent_doc_number] => 11495675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Manufacture method of lateral double-diffused transistor [patent_app_type] => utility [patent_app_number] => 17/376111 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 33 [patent_no_of_words] => 11457 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17376111 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/376111
Manufacture method of lateral double-diffused transistor Jul 13, 2021 Issued
Array ( [id] => 17174362 [patent_doc_number] => 20210328033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/365078 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12672 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365078 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/365078
Semiconductor device having buried gate structure and method for fabricating the same Jun 30, 2021 Issued
Array ( [id] => 18859145 [patent_doc_number] => 11856755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Method for manufacturing memory and memory [patent_app_type] => utility [patent_app_number] => 17/441194 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 4034 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17441194 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/441194
Method for manufacturing memory and memory Jun 29, 2021 Issued
Array ( [id] => 17908685 [patent_doc_number] => 11462548 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-10-04 [patent_title] => Semicondcutor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/355142 [patent_app_country] => US [patent_app_date] => 2021-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4131 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17355142 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/355142
Semicondcutor device and manufacturing method thereof Jun 21, 2021 Issued
Array ( [id] => 17145202 [patent_doc_number] => 20210313215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => DIE ATTACH SYSTEMS, AND METHODS OF ATTACHING A DIE TO A SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/353368 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3208 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353368 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/353368
Die attach systems, and methods of attaching a die to a substrate Jun 20, 2021 Issued
Array ( [id] => 18081176 [patent_doc_number] => 20220406788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => Silicon-Containing Layer for Bit Line Resistance Reduction [patent_app_type] => utility [patent_app_number] => 17/351223 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4321 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17351223 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/351223
Silicon-containing layer for bit line resistance reduction Jun 16, 2021 Issued
Array ( [id] => 17818707 [patent_doc_number] => 11424331 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-23 [patent_title] => Power semiconductor device for improving hot carrier injection [patent_app_type] => utility [patent_app_number] => 17/348790 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 8602 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17348790 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/348790
Power semiconductor device for improving hot carrier injection Jun 15, 2021 Issued
Array ( [id] => 18061922 [patent_doc_number] => 20220393009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => EXTENDED-DRAIN METAL-OXIDE-SEMICONDUCTOR DEVICES WITH A NOTCHED GATE ELECTRODE [patent_app_type] => utility [patent_app_number] => 17/341858 [patent_app_country] => US [patent_app_date] => 2021-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341858 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/341858
Extended-drain metal-oxide-semiconductor devices with a notched gate electrode Jun 7, 2021 Issued
Array ( [id] => 20389330 [patent_doc_number] => 12489065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-02 [patent_title] => Fabrication method of semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/338292 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 3540 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338292 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/338292
Fabrication method of semiconductor structure Jun 2, 2021 Issued
Array ( [id] => 19094047 [patent_doc_number] => 11955514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Field-effect transistors with a gate structure in a dual-depth trench isolation structure [patent_app_type] => utility [patent_app_number] => 17/335093 [patent_app_country] => US [patent_app_date] => 2021-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4730 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17335093 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/335093
Field-effect transistors with a gate structure in a dual-depth trench isolation structure May 31, 2021 Issued
Array ( [id] => 18859138 [patent_doc_number] => 11856748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Semiconductor memory preparation method and semiconductor memory [patent_app_type] => utility [patent_app_number] => 17/599792 [patent_app_country] => US [patent_app_date] => 2021-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 27 [patent_no_of_words] => 6800 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17599792 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/599792
Semiconductor memory preparation method and semiconductor memory May 31, 2021 Issued
Array ( [id] => 17536768 [patent_doc_number] => 20220115377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/331725 [patent_app_country] => US [patent_app_date] => 2021-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17331725 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/331725
Semiconductor devices May 26, 2021 Issued
Array ( [id] => 17070387 [patent_doc_number] => 20210272604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => 3-D DRAM Structure With Vertical Bit-Line [patent_app_type] => utility [patent_app_number] => 17/323165 [patent_app_country] => US [patent_app_date] => 2021-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17323165 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/323165
3-D DRAM structure with vertical bit-line May 17, 2021 Issued
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