Search

Mohammed R. Alam

Examiner (ID: 12517, Phone: (571)272-1564 , Office: P/2828 )

Most Active Art Unit
2828
Art Unit(s)
2823, 2897, 2828
Total Applications
809
Issued Applications
688
Pending Applications
72
Abandoned Applications
64

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6031376 [patent_doc_number] => 20110055487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'OPTIMIZING MEMORY COPY ROUTINE SELECTION FOR MESSAGE PASSING IN A MULTICORE ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 12/922194 [patent_app_country] => US [patent_app_date] => 2008-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4166 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20110055487.pdf [firstpage_image] =>[orig_patent_app_number] => 12922194 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/922194
Optimizing memory copy routine selection for message passing in a multicore architecture Mar 30, 2008 Issued
Array ( [id] => 8366552 [patent_doc_number] => 08255628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-28 [patent_title] => 'Structure for multi-level memory architecture with data prioritization' [patent_app_type] => utility [patent_app_number] => 12/056690 [patent_app_country] => US [patent_app_date] => 2008-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4010 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12056690 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/056690
Structure for multi-level memory architecture with data prioritization Mar 26, 2008 Issued
Array ( [id] => 188390 [patent_doc_number] => 07650467 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-19 [patent_title] => 'Coordination of multiprocessor operations with shared resources' [patent_app_type] => utility [patent_app_number] => 12/052569 [patent_app_country] => US [patent_app_date] => 2008-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4286 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/650/07650467.pdf [firstpage_image] =>[orig_patent_app_number] => 12052569 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/052569
Coordination of multiprocessor operations with shared resources Mar 19, 2008 Issued
Array ( [id] => 4928873 [patent_doc_number] => 20080168236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-10 [patent_title] => 'PERFORMANCE OF A CACHE BY DETECTING CACHE LINES THAT HAVE BEEN REUSED' [patent_app_type] => utility [patent_app_number] => 12/051012 [patent_app_country] => US [patent_app_date] => 2008-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5550 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20080168236.pdf [firstpage_image] =>[orig_patent_app_number] => 12051012 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/051012
Performance of a cache by detecting cache lines that have been reused Mar 18, 2008 Issued
Array ( [id] => 593422 [patent_doc_number] => 07461220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-02 [patent_title] => 'Free item distribution among multiple free lists during garbage collection for more efficient object allocation' [patent_app_type] => utility [patent_app_number] => 12/032739 [patent_app_country] => US [patent_app_date] => 2008-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 11965 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/461/07461220.pdf [firstpage_image] =>[orig_patent_app_number] => 12032739 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/032739
Free item distribution among multiple free lists during garbage collection for more efficient object allocation Feb 17, 2008 Issued
Array ( [id] => 7681130 [patent_doc_number] => 20100023678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY SYSTEM, AND ACCESS DEVICE' [patent_app_type] => utility [patent_app_number] => 12/523756 [patent_app_country] => US [patent_app_date] => 2008-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 23184 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20100023678.pdf [firstpage_image] =>[orig_patent_app_number] => 12523756 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/523756
Nonvolatile memory device, nonvolatile memory system, and access device having a variable read and write access rate Jan 24, 2008 Issued
Array ( [id] => 4847591 [patent_doc_number] => 20080183999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'Method Of Updating Data' [patent_app_type] => utility [patent_app_number] => 12/019237 [patent_app_country] => US [patent_app_date] => 2008-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3855 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20080183999.pdf [firstpage_image] =>[orig_patent_app_number] => 12019237 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/019237
Updating data entries stored on a data storage unit from an authority Jan 23, 2008 Issued
Array ( [id] => 5381360 [patent_doc_number] => 20090193199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-30 [patent_title] => 'Method for Increasing Cache Directory Associativity Classes Via Efficient Tag Bit Reclaimation' [patent_app_type] => utility [patent_app_number] => 12/019068 [patent_app_country] => US [patent_app_date] => 2008-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3167 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20090193199.pdf [firstpage_image] =>[orig_patent_app_number] => 12019068 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/019068
Method for increasing cache directory associativity classes via efficient tag bit reclaimation Jan 23, 2008 Issued
Array ( [id] => 4956453 [patent_doc_number] => 20080189477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'STORAGE SYSTEM AND STORAGE MANAGEMENT METHOD' [patent_app_type] => utility [patent_app_number] => 12/019049 [patent_app_country] => US [patent_app_date] => 2008-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6923 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20080189477.pdf [firstpage_image] =>[orig_patent_app_number] => 12019049 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/019049
Storage system and storage management method for controlling off-line mode and on-line mode of flash memory Jan 23, 2008 Issued
Array ( [id] => 4815051 [patent_doc_number] => 20080195682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'Multiple computer system with enhanced memory clean up' [patent_app_type] => utility [patent_app_number] => 12/011199 [patent_app_country] => US [patent_app_date] => 2008-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9855 [patent_no_of_claims] => 125 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20080195682.pdf [firstpage_image] =>[orig_patent_app_number] => 12011199 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/011199
Multiple computer system with enhanced memory clean up Jan 22, 2008 Abandoned
Array ( [id] => 4895032 [patent_doc_number] => 20080104131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'METHOD AND SYSTEM FOR SYNCHRONIZING DIRECT ACCESS STORAGE VOLUMES' [patent_app_type] => utility [patent_app_number] => 11/968725 [patent_app_country] => US [patent_app_date] => 2008-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9914 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20080104131.pdf [firstpage_image] =>[orig_patent_app_number] => 11968725 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/968725
Method and system for synchronizing direct access storage volumes Jan 2, 2008 Issued
Array ( [id] => 4895217 [patent_doc_number] => 20080104317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'SYSTEM AND COMPUTER PROGRAM PRODUCT FOR SYNCHRONIZING DIRECT ACCESS STORAGE VOLUMES' [patent_app_type] => utility [patent_app_number] => 11/968675 [patent_app_country] => US [patent_app_date] => 2008-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9930 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20080104317.pdf [firstpage_image] =>[orig_patent_app_number] => 11968675 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/968675
System and computer program product for synchronizing direct access storage volumes Jan 2, 2008 Issued
Array ( [id] => 106824 [patent_doc_number] => 07730274 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-06-01 [patent_title] => 'Preventing undesired trespass in storage arrays' [patent_app_type] => utility [patent_app_number] => 11/967333 [patent_app_country] => US [patent_app_date] => 2007-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12351 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/730/07730274.pdf [firstpage_image] =>[orig_patent_app_number] => 11967333 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/967333
Preventing undesired trespass in storage arrays Dec 30, 2007 Issued
Array ( [id] => 4787658 [patent_doc_number] => 20080140987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-12 [patent_title] => 'SYSTEM AND METHOD FOR CONTEXT-INDEPENDENT CODES FOR OFF-CHIP INTERCONNECTS' [patent_app_type] => utility [patent_app_number] => 11/953028 [patent_app_country] => US [patent_app_date] => 2007-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10117 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20080140987.pdf [firstpage_image] =>[orig_patent_app_number] => 11953028 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/953028
System and method for context-independent codes for off-chip interconnects Dec 7, 2007 Issued
Array ( [id] => 4730320 [patent_doc_number] => 20080209101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'Storage device control apparatus and control method for the storage device control apparatus' [patent_app_type] => utility [patent_app_number] => 11/984570 [patent_app_country] => US [patent_app_date] => 2007-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 14145 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20080209101.pdf [firstpage_image] =>[orig_patent_app_number] => 11984570 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/984570
Storage device control apparatus and control method for the storage device control apparatus Nov 19, 2007 Issued
Array ( [id] => 8552206 [patent_doc_number] => 08327104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-04 [patent_title] => 'Adjusting the timing of signals associated with a memory system' [patent_app_type] => utility [patent_app_number] => 11/939440 [patent_app_country] => US [patent_app_date] => 2007-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4724 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11939440 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/939440
Adjusting the timing of signals associated with a memory system Nov 12, 2007 Issued
Array ( [id] => 4614121 [patent_doc_number] => 07996636 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-08-09 [patent_title] => 'Uniquely identifying block context signatures in a storage volume hierarchy' [patent_app_type] => utility [patent_app_number] => 11/935704 [patent_app_country] => US [patent_app_date] => 2007-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 17539 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/996/07996636.pdf [firstpage_image] =>[orig_patent_app_number] => 11935704 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/935704
Uniquely identifying block context signatures in a storage volume hierarchy Nov 5, 2007 Issued
Array ( [id] => 4499215 [patent_doc_number] => 07904642 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-03-08 [patent_title] => 'Method for combining and storing access control lists' [patent_app_type] => utility [patent_app_number] => 11/935286 [patent_app_country] => US [patent_app_date] => 2007-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 30 [patent_no_of_words] => 16203 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/904/07904642.pdf [firstpage_image] =>[orig_patent_app_number] => 11935286 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/935286
Method for combining and storing access control lists Nov 4, 2007 Issued
Array ( [id] => 4966809 [patent_doc_number] => 20080109629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-08 [patent_title] => 'ASYMMETRIC MEMORY MIGRATION IN HYBRID MAIN MEMORY' [patent_app_type] => utility [patent_app_number] => 11/935224 [patent_app_country] => US [patent_app_date] => 2007-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13961 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20080109629.pdf [firstpage_image] =>[orig_patent_app_number] => 11935224 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/935224
Asymmetric memory migration in hybrid main memory Nov 4, 2007 Issued
Array ( [id] => 8683 [patent_doc_number] => 07818489 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-19 [patent_title] => 'Integrating data from symmetric and asymmetric memory' [patent_app_type] => utility [patent_app_number] => 11/935275 [patent_app_country] => US [patent_app_date] => 2007-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 14092 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/818/07818489.pdf [firstpage_image] =>[orig_patent_app_number] => 11935275 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/935275
Integrating data from symmetric and asymmetric memory Nov 4, 2007 Issued
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