
Mohammed R. Alam
Examiner (ID: 12517, Phone: (571)272-1564 , Office: P/2828 )
| Most Active Art Unit | 2828 |
| Art Unit(s) | 2823, 2897, 2828 |
| Total Applications | 809 |
| Issued Applications | 688 |
| Pending Applications | 72 |
| Abandoned Applications | 64 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
| 13/790036 | COMPUTER SYSTEM HAVING NON-VOLATILE MEMORY AND METHOD OF OPERATING THE COMPUTER SYSTEM TO DELETE DATA BASED ON AN EXTERNAL COMMAND | Mar 7, 2013 | Abandoned |
Array
(
[id] => 9203965
[patent_doc_number] => 20140003142
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-02
[patent_title] => 'NONVOLATILE MEMORY DEVICE PERFORMING GARBAGE COLLECTION'
[patent_app_type] => utility
[patent_app_number] => 13/786501
[patent_app_country] => US
[patent_app_date] => 2013-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5700
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13786501
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/786501 | Devices and methods of managing nonvolatile memory device having single-level cell and multi-level cell areas | Mar 5, 2013 | Issued |
Array
(
[id] => 10847639
[patent_doc_number] => 08874840
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-10-28
[patent_title] => 'Adaptive prestaging in a storage controller'
[patent_app_type] => utility
[patent_app_number] => 13/786981
[patent_app_country] => US
[patent_app_date] => 2013-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6801
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13786981
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/786981 | Adaptive prestaging in a storage controller | Mar 5, 2013 | Issued |
Array
(
[id] => 9096390
[patent_doc_number] => 20130275701
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-17
[patent_title] => 'MANAGEMENT OF DATA PROCESSING SECURITY IN A SECONDARY PROCESSOR'
[patent_app_type] => utility
[patent_app_number] => 13/777338
[patent_app_country] => US
[patent_app_date] => 2013-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 10726
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13777338
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/777338 | Management of data processing security in a secondary processor | Feb 25, 2013 | Issued |
Array
(
[id] => 9847633
[patent_doc_number] => 08949567
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-02-03
[patent_title] => 'Cross-point resistive-based memory architecture'
[patent_app_type] => utility
[patent_app_number] => 13/777137
[patent_app_country] => US
[patent_app_date] => 2013-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 5961
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13777137
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/777137 | Cross-point resistive-based memory architecture | Feb 25, 2013 | Issued |
Array
(
[id] => 10616713
[patent_doc_number] => 09336158
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-10
[patent_title] => 'Method and system for simplified address translation support for static infiniband host channel adaptor structures'
[patent_app_type] => utility
[patent_app_number] => 13/777560
[patent_app_country] => US
[patent_app_date] => 2013-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9517
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13777560
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/777560 | Method and system for simplified address translation support for static infiniband host channel adaptor structures | Feb 25, 2013 | Issued |
Array
(
[id] => 9688184
[patent_doc_number] => 20140244949
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-28
[patent_title] => 'Asynchronous Data Mirroring in Memory Controller'
[patent_app_type] => utility
[patent_app_number] => 13/777470
[patent_app_country] => US
[patent_app_date] => 2013-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6027
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13777470
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/777470 | Asynchronous data mirroring in memory controller | Feb 25, 2013 | Issued |
Array
(
[id] => 9688191
[patent_doc_number] => 20140244956
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-28
[patent_title] => 'STORAGE SYSTEM IN WHICH FICTITIOUS INFORMATION IS PREVENTED'
[patent_app_type] => utility
[patent_app_number] => 13/777081
[patent_app_country] => US
[patent_app_date] => 2013-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 51
[patent_figures_cnt] => 51
[patent_no_of_words] => 25822
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13777081
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/777081 | STORAGE SYSTEM IN WHICH FICTITIOUS INFORMATION IS PREVENTED | Feb 25, 2013 | Abandoned |
Array
(
[id] => 10651206
[patent_doc_number] => 09367458
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-06-14
[patent_title] => 'Programmable coherent proxy for attached processor'
[patent_app_type] => utility
[patent_app_number] => 13/777028
[patent_app_country] => US
[patent_app_date] => 2013-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 13020
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13777028
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/777028 | Programmable coherent proxy for attached processor | Feb 25, 2013 | Issued |
Array
(
[id] => 9688155
[patent_doc_number] => 20140244920
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-28
[patent_title] => 'SCHEME TO ESCALATE REQUESTS WITH ADDRESS CONFLICTS'
[patent_app_type] => utility
[patent_app_number] => 13/777777
[patent_app_country] => US
[patent_app_date] => 2013-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 9099
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13777777
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/777777 | Scheme to escalate requests with address conflicts | Feb 25, 2013 | Issued |
Array
(
[id] => 10651010
[patent_doc_number] => 09367262
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-06-14
[patent_title] => 'Assigning a weighting to host quality of service indicators'
[patent_app_type] => utility
[patent_app_number] => 13/776896
[patent_app_country] => US
[patent_app_date] => 2013-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 6041
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13776896
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/776896 | Assigning a weighting to host quality of service indicators | Feb 25, 2013 | Issued |
Array
(
[id] => 9652121
[patent_doc_number] => 08806155
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-12
[patent_title] => 'Methods and apparatus for designating or using data status indicators'
[patent_app_type] => utility
[patent_app_number] => 13/775645
[patent_app_country] => US
[patent_app_date] => 2013-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 5267
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13775645
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/775645 | Methods and apparatus for designating or using data status indicators | Feb 24, 2013 | Issued |
Array
(
[id] => 9820862
[patent_doc_number] => 08930664
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-01-06
[patent_title] => 'Method and apparatus for transferring data from a first domain to a second domain'
[patent_app_type] => utility
[patent_app_number] => 13/763960
[patent_app_country] => US
[patent_app_date] => 2013-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7048
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13763960
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/763960 | Method and apparatus for transferring data from a first domain to a second domain | Feb 10, 2013 | Issued |
Array
(
[id] => 9044091
[patent_doc_number] => 20130246728
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-19
[patent_title] => 'INFORMATION PROCESSING APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 13/763918
[patent_app_country] => US
[patent_app_date] => 2013-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 40
[patent_no_of_words] => 12678
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13763918
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/763918 | Information processing apparatus for restricting access to memory area of first program from second program | Feb 10, 2013 | Issued |
Array
(
[id] => 10524301
[patent_doc_number] => 09250814
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-02
[patent_title] => 'Command order re-sequencing in non-volatile memory'
[patent_app_type] => utility
[patent_app_number] => 13/763928
[patent_app_country] => US
[patent_app_date] => 2013-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 5097
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13763928
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/763928 | Command order re-sequencing in non-volatile memory | Feb 10, 2013 | Issued |
Array
(
[id] => 9640907
[patent_doc_number] => 20140219018
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-07
[patent_title] => 'NON-VOLATILE MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/761217
[patent_app_country] => US
[patent_app_date] => 2013-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4562
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13761217
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/761217 | Non-volatile memory device with an EPLI comparator | Feb 6, 2013 | Issued |
Array
(
[id] => 8831643
[patent_doc_number] => 20130132688
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-23
[patent_title] => 'Parallel Read Functional Unit for Microprocessors'
[patent_app_type] => utility
[patent_app_number] => 13/736379
[patent_app_country] => US
[patent_app_date] => 2013-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8381
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13736379
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/736379 | Parallel read functional unit for microprocessors | Jan 7, 2013 | Issued |
Array
(
[id] => 8781930
[patent_doc_number] => 20130103905
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-25
[patent_title] => 'Optimizing Memory Copy Routine Selection For Message Passing In A Multicore Architecture'
[patent_app_type] => utility
[patent_app_number] => 13/706743
[patent_app_country] => US
[patent_app_date] => 2012-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4213
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13706743
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/706743 | Optimizing memory copy routine selection for message passing in a multicore architecture | Dec 5, 2012 | Issued |
Array
(
[id] => 11213817
[patent_doc_number] => 09442852
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-09-13
[patent_title] => 'Programmable coherent proxy for attached processor'
[patent_app_type] => utility
[patent_app_number] => 13/686537
[patent_app_country] => US
[patent_app_date] => 2012-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 12965
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13686537
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/686537 | Programmable coherent proxy for attached processor | Nov 26, 2012 | Issued |
Array
(
[id] => 8746614
[patent_doc_number] => 20130086331
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-04
[patent_title] => 'INFORMATION PROCESSING SYSTEM AND A SYSTEM CONTROLLER'
[patent_app_type] => utility
[patent_app_number] => 13/686171
[patent_app_country] => US
[patent_app_date] => 2012-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 11243
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13686171
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/686171 | Information processing system and a system controller | Nov 26, 2012 | Issued |