Search

Mohammed R. Alam

Examiner (ID: 12517, Phone: (571)272-1564 , Office: P/2828 )

Most Active Art Unit
2828
Art Unit(s)
2823, 2897, 2828
Total Applications
809
Issued Applications
688
Pending Applications
72
Abandoned Applications
64

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8746618 [patent_doc_number] => 20130086335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'MEMORY SYSTEM AND MEMORY INTERFACE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/686165 [patent_app_country] => US [patent_app_date] => 2012-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4481 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13686165 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/686165
MEMORY SYSTEM AND MEMORY INTERFACE DEVICE Nov 26, 2012 Abandoned
Array ( [id] => 9513211 [patent_doc_number] => 20140149703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-29 [patent_title] => 'CONTENTION BLOCKING BUFFER' [patent_app_type] => utility [patent_app_number] => 13/686588 [patent_app_country] => US [patent_app_date] => 2012-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5082 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13686588 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/686588
Contention blocking buffer Nov 26, 2012 Issued
Array ( [id] => 9820835 [patent_doc_number] => 08930638 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-06 [patent_title] => 'Method and apparatus for supporting target-side security in a cache coherent system' [patent_app_type] => utility [patent_app_number] => 13/686604 [patent_app_country] => US [patent_app_date] => 2012-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4973 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13686604 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/686604
Method and apparatus for supporting target-side security in a cache coherent system Nov 26, 2012 Issued
Array ( [id] => 11213817 [patent_doc_number] => 09442852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-13 [patent_title] => 'Programmable coherent proxy for attached processor' [patent_app_type] => utility [patent_app_number] => 13/686537 [patent_app_country] => US [patent_app_date] => 2012-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12965 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13686537 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/686537
Programmable coherent proxy for attached processor Nov 26, 2012 Issued
Array ( [id] => 9451655 [patent_doc_number] => 20140122825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'COMPUTER SYSTEM AND METHOD FOR UPDATING CONFIGURATION INFORMATION' [patent_app_type] => utility [patent_app_number] => 13/696350 [patent_app_country] => US [patent_app_date] => 2012-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 14579 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13696350 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/696350
COMPUTER SYSTEM AND METHOD FOR UPDATING CONFIGURATION INFORMATION Oct 29, 2012 Abandoned
Array ( [id] => 9451631 [patent_doc_number] => 20140122801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'MEMORY CONTROLLER WITH INTER-CORE INTERFERENCE DETECTION' [patent_app_type] => utility [patent_app_number] => 13/663335 [patent_app_country] => US [patent_app_date] => 2012-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6877 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13663335 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/663335
Memory controller with inter-core interference detection Oct 28, 2012 Issued
Array ( [id] => 10059105 [patent_doc_number] => 09098466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-04 [patent_title] => 'Switching between mirrored volumes' [patent_app_type] => utility [patent_app_number] => 13/663221 [patent_app_country] => US [patent_app_date] => 2012-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7175 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13663221 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/663221
Switching between mirrored volumes Oct 28, 2012 Issued
Array ( [id] => 9451625 [patent_doc_number] => 20140122795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'DATA PLACEMENT FOR LOSS PROTECTION IN A STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/663299 [patent_app_country] => US [patent_app_date] => 2012-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13148 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13663299 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/663299
Data placement for loss protection in a storage system Oct 28, 2012 Issued
Array ( [id] => 8672383 [patent_doc_number] => 20130046921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'METHOD OF CONFIGURING NON-VOLATILE MEMORY FOR A HYBRID DISK DRIVE' [patent_app_type] => utility [patent_app_number] => 13/655582 [patent_app_country] => US [patent_app_date] => 2012-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13608 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13655582 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/655582
Method of configuring non-volatile memory for a hybrid disk drive Oct 18, 2012 Issued
Array ( [id] => 8782029 [patent_doc_number] => 20130104004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'RAM MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/653141 [patent_app_country] => US [patent_app_date] => 2012-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4401 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13653141 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/653141
RAM memory device capable of simultaneously accepting multiple accesses Oct 15, 2012 Issued
Array ( [id] => 9961220 [patent_doc_number] => 09009444 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-04-14 [patent_title] => 'System and method for LUN control management' [patent_app_type] => utility [patent_app_number] => 13/631897 [patent_app_country] => US [patent_app_date] => 2012-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6023 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13631897 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/631897
System and method for LUN control management Sep 28, 2012 Issued
Array ( [id] => 9398420 [patent_doc_number] => 20140095826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'SYSTEM AND METHOD FOR ALLOCATING DATASTORES FOR VIRTUAL MACHINES' [patent_app_type] => utility [patent_app_number] => 13/631927 [patent_app_country] => US [patent_app_date] => 2012-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8716 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13631927 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/631927
System and method for allocating datastores for virtual machines Sep 28, 2012 Issued
Array ( [id] => 9398411 [patent_doc_number] => 20140095817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'SYSTEM AND METHOD FOR INCREMENTAL VIRTUAL MACHINE BACKUP USING STORAGE SYSTEM FUNCTIONALITY' [patent_app_type] => utility [patent_app_number] => 13/631794 [patent_app_country] => US [patent_app_date] => 2012-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8330 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13631794 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/631794
System and method for incremental virtual machine backup using storage system functionality Sep 27, 2012 Issued
Array ( [id] => 9398379 [patent_doc_number] => 20140095785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'Content Aware Block Power Savings' [patent_app_type] => utility [patent_app_number] => 13/631412 [patent_app_country] => US [patent_app_date] => 2012-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5548 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13631412 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/631412
Content Aware Block Power Savings Sep 27, 2012 Abandoned
Array ( [id] => 9372420 [patent_doc_number] => 20140082293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'Store Buffer for Transactional Memory' [patent_app_type] => utility [patent_app_number] => 13/621256 [patent_app_country] => US [patent_app_date] => 2012-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5466 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13621256 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/621256
Store buffer for transactional memory Sep 15, 2012 Issued
Array ( [id] => 8816450 [patent_doc_number] => 20130117495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'CONFIGURABLE MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/620207 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12195 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13620207 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/620207
Configurable multirank memory system with interface circuit Sep 13, 2012 Issued
Array ( [id] => 8608574 [patent_doc_number] => 20130013886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-10 [patent_title] => 'ADAPTIVE WEAR LEVELING VIA MONITORING THE PROPERTIES OF MEMORY REFERENCE STREAM' [patent_app_type] => utility [patent_app_number] => 13/619513 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7215 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13619513 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/619513
Adaptive wear leveling via monitoring the properties of memory reference stream Sep 13, 2012 Issued
Array ( [id] => 9218410 [patent_doc_number] => 08631220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-14 [patent_title] => 'Adjusting the timing of signals associated with a memory system' [patent_app_type] => utility [patent_app_number] => 13/615008 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4761 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13615008 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/615008
Adjusting the timing of signals associated with a memory system Sep 12, 2012 Issued
Array ( [id] => 8588517 [patent_doc_number] => 20130007338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'WRITING TO ASYMMETRIC MEMORY' [patent_app_type] => utility [patent_app_number] => 13/608937 [patent_app_country] => US [patent_app_date] => 2012-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 14604 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13608937 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/608937
Handling writes to a memory including asymmetric and symmetric components Sep 9, 2012 Issued
Array ( [id] => 8568632 [patent_doc_number] => 20120331203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'I/O CONVERSION METHOD AND APPARATUS FOR STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/604950 [patent_app_country] => US [patent_app_date] => 2012-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 12324 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604950 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/604950
I/O conversion method and apparatus for storage system Sep 5, 2012 Issued
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