Mohammed S Haque
Examiner (ID: 15293)
Most Active Art Unit | 2186 |
Art Unit(s) | 2186 |
Total Applications | 6 |
Issued Applications | 4 |
Pending Applications | 0 |
Abandoned Applications | 2 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 18833869
[patent_doc_number] => 20230402396
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-14
[patent_title] => SEMICONDUCTOR PACKAGES INCLUDING AT LEAST ONE DIE POSITION CHECKER
[patent_app_type] => utility
[patent_app_number] => 18/450143
[patent_app_country] => US
[patent_app_date] => 2023-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9042
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450143
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/450143 | Semiconductor packages including at least one die position checker | Aug 14, 2023 | Issued |
Array
(
[id] => 18774463
[patent_doc_number] => 20230369294
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-16
[patent_title] => FAN-OUT PACKAGES PROVIDING ENHANCED MECHANICAL STRENGTH AND METHODS FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/360734
[patent_app_country] => US
[patent_app_date] => 2023-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13548
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18360734
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/360734 | FAN-OUT PACKAGES PROVIDING ENHANCED MECHANICAL STRENGTH AND METHODS FOR FORMING THE SAME | Jul 26, 2023 | Pending |
Array
(
[id] => 18906097
[patent_doc_number] => 20240021582
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-18
[patent_title] => HIGH CONNECTIVITY DEVICE STACKING
[patent_app_type] => utility
[patent_app_number] => 18/360749
[patent_app_country] => US
[patent_app_date] => 2023-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12960
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18360749
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/360749 | HIGH CONNECTIVITY DEVICE STACKING | Jul 26, 2023 | Pending |
Array
(
[id] => 18774405
[patent_doc_number] => 20230369236
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-16
[patent_title] => MICROELECTRONIC ASSEMBLIES
[patent_app_type] => utility
[patent_app_number] => 18/358261
[patent_app_country] => US
[patent_app_date] => 2023-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18374
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358261
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/358261 | MICROELECTRONIC ASSEMBLIES | Jul 24, 2023 | Pending |
Array
(
[id] => 18848995
[patent_doc_number] => 20230411399
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-21
[patent_title] => Integrated Circuit Structure and Method with Hybrid Orientation for FinFET
[patent_app_type] => utility
[patent_app_number] => 18/355895
[patent_app_country] => US
[patent_app_date] => 2023-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6825
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18355895
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/355895 | Integrated Circuit Structure and Method with Hybrid Orientation for FinFET | Jul 19, 2023 | Pending |
Array
(
[id] => 18729456
[patent_doc_number] => 20230343752
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-26
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/216445
[patent_app_country] => US
[patent_app_date] => 2023-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6826
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216445
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/216445 | SEMICONDUCTOR PACKAGE | Jun 28, 2023 | Pending |
Array
(
[id] => 18729311
[patent_doc_number] => 20230343607
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-26
[patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/215100
[patent_app_country] => US
[patent_app_date] => 2023-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10462
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18215100
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/215100 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES | Jun 26, 2023 | Pending |
Array
(
[id] => 18712868
[patent_doc_number] => 20230335501
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-19
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/214172
[patent_app_country] => US
[patent_app_date] => 2023-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14137
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18214172
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/214172 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME | Jun 25, 2023 | Pending |
Array
(
[id] => 18600294
[patent_doc_number] => 20230275095
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-31
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/312844
[patent_app_country] => US
[patent_app_date] => 2023-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6764
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312844
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/312844 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME | May 4, 2023 | Pending |
Array
(
[id] => 18891069
[patent_doc_number] => 11869846
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-01-09
[patent_title] => Interposer routing structure and semiconductor package
[patent_app_type] => utility
[patent_app_number] => 18/312599
[patent_app_country] => US
[patent_app_date] => 2023-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 4676
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 271
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312599
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/312599 | Interposer routing structure and semiconductor package | May 4, 2023 | Issued |
Array
(
[id] => 18586040
[patent_doc_number] => 20230268305
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-24
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/308610
[patent_app_country] => US
[patent_app_date] => 2023-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7322
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18308610
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/308610 | SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME | Apr 26, 2023 | Pending |
Array
(
[id] => 19199143
[patent_doc_number] => 11996392
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-05-28
[patent_title] => Semiconductor package including stacked semiconductor chips
[patent_app_type] => utility
[patent_app_number] => 18/304106
[patent_app_country] => US
[patent_app_date] => 2023-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 19
[patent_no_of_words] => 13220
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 395
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18304106
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/304106 | Semiconductor package including stacked semiconductor chips | Apr 19, 2023 | Issued |
Array
(
[id] => 19213654
[patent_doc_number] => 12002726
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-04
[patent_title] => Semiconductor package and method of manufacture
[patent_app_type] => utility
[patent_app_number] => 18/112715
[patent_app_country] => US
[patent_app_date] => 2023-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 23
[patent_no_of_words] => 6406
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18112715
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/112715 | Semiconductor package and method of manufacture | Feb 21, 2023 | Issued |
Array
(
[id] => 19244560
[patent_doc_number] => 12015015
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-18
[patent_title] => Semiconductor package and semiconductor module including the same
[patent_app_type] => utility
[patent_app_number] => 18/108503
[patent_app_country] => US
[patent_app_date] => 2023-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 8322
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18108503
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/108503 | Semiconductor package and semiconductor module including the same | Feb 9, 2023 | Issued |
Array
(
[id] => 18408978
[patent_doc_number] => 20230170331
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-01
[patent_title] => MULTI-HEIGHT INTERCONNECT STRUCTURES AND ASSOCIATED SYSTEMS AND METHODS
[patent_app_type] => utility
[patent_app_number] => 18/103315
[patent_app_country] => US
[patent_app_date] => 2023-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3659
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18103315
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/103315 | MULTI-HEIGHT INTERCONNECT STRUCTURES AND ASSOCIATED SYSTEMS AND METHODS | Jan 29, 2023 | Pending |
Array
(
[id] => 18439921
[patent_doc_number] => 20230187216
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => Semiconductor FinFET Device and Method
[patent_app_type] => utility
[patent_app_number] => 18/155554
[patent_app_country] => US
[patent_app_date] => 2023-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12325
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155554
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/155554 | Semiconductor FinFET Device and Method | Jan 16, 2023 | Pending |
Array
(
[id] => 18379630
[patent_doc_number] => 20230154719
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => CHARGED PARTICLE SOURCE MODULE
[patent_app_type] => utility
[patent_app_number] => 18/155684
[patent_app_country] => US
[patent_app_date] => 2023-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10395
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155684
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/155684 | CHARGED PARTICLE SOURCE MODULE | Jan 16, 2023 | Pending |
Array
(
[id] => 18533700
[patent_doc_number] => 20230238777
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-27
[patent_title] => MANUFACTURABLE DEVICES FORMED ON GALLIUM AND NITROGEN MATERIAL
[patent_app_type] => utility
[patent_app_number] => 18/095891
[patent_app_country] => US
[patent_app_date] => 2023-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 30800
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18095891
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/095891 | Manufacturable devices formed on gallium and nitrogen material | Jan 10, 2023 | Issued |
Array
(
[id] => 18325699
[patent_doc_number] => 20230123827
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-20
[patent_title] => Low-Resistance Contact Plugs and Method Forming Same
[patent_app_type] => utility
[patent_app_number] => 18/068041
[patent_app_country] => US
[patent_app_date] => 2022-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5440
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18068041
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/068041 | Low-resistance contact plugs and method forming same | Dec 18, 2022 | Issued |
Array
(
[id] => 18967569
[patent_doc_number] => 11901351
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-13
[patent_title] => Three dimensional integrated circuit with lateral connection layer
[patent_app_type] => utility
[patent_app_number] => 17/883477
[patent_app_country] => US
[patent_app_date] => 2022-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 18
[patent_no_of_words] => 12979
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17883477
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/883477 | Three dimensional integrated circuit with lateral connection layer | Aug 7, 2022 | Issued |