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Mohammed S Haque

Examiner (ID: 15293)

Most Active Art Unit
2186
Art Unit(s)
2186
Total Applications
6
Issued Applications
4
Pending Applications
0
Abandoned Applications
2

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16456051 [patent_doc_number] => 20200365477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => Component Carrier With Surface-Contactable Component Embedded in Laminated Stack [patent_app_type] => utility [patent_app_number] => 15/929600 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9606 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15929600 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/929600
Component Carrier With Surface-Contactable Component Embedded in Laminated Stack May 11, 2020 Pending
Array ( [id] => 16796150 [patent_doc_number] => 20210125967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => Fully Interconnected Heterogeneous Multi-layer Reconstructed Silicon Device [patent_app_type] => utility [patent_app_number] => 16/869468 [patent_app_country] => US [patent_app_date] => 2020-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869468 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/869468
Fully interconnected heterogeneous multi-layer reconstructed silicon device May 6, 2020 Issued
Array ( [id] => 16692200 [patent_doc_number] => 20210074679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => SEMICONDUCTOR PACKAGE INCLUDING STACKED SEMICONDUCTOR CHIPS [patent_app_type] => utility [patent_app_number] => 16/867348 [patent_app_country] => US [patent_app_date] => 2020-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10084 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16867348 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/867348
Semiconductor package including stacked semiconductor chips May 4, 2020 Issued
Array ( [id] => 17917851 [patent_doc_number] => 20220320247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => DISPLAY SUBSTRATE AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/428402 [patent_app_country] => US [patent_app_date] => 2020-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17428402 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/428402
Display substrate and display device Apr 25, 2020 Issued
Array ( [id] => 19046750 [patent_doc_number] => 11935870 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Method for manufacturing semiconductor device having dolmen structure, method for manufacturing support piece, and laminated film [patent_app_type] => utility [patent_app_number] => 17/439404 [patent_app_country] => US [patent_app_date] => 2020-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 8414 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17439404 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/439404
Method for manufacturing semiconductor device having dolmen structure, method for manufacturing support piece, and laminated film Apr 23, 2020 Issued
Array ( [id] => 19399751 [patent_doc_number] => 12074139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Semiconductor device having dolmen structure and manufacturing method therefor, and support piece formation laminate film and manufacturing method therefor [patent_app_type] => utility [patent_app_number] => 17/439402 [patent_app_country] => US [patent_app_date] => 2020-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 9540 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17439402 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/439402
Semiconductor device having dolmen structure and manufacturing method therefor, and support piece formation laminate film and manufacturing method therefor Apr 23, 2020 Issued
Array ( [id] => 16226312 [patent_doc_number] => 20200251429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-06 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/855705 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 427 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16855705 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/855705
Semiconductor device Apr 21, 2020 Issued
Array ( [id] => 16226214 [patent_doc_number] => 20200251331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-06 [patent_title] => ARGON ADDITION TO REMOTE PLASMA OXIDATION [patent_app_type] => utility [patent_app_number] => 16/849713 [patent_app_country] => US [patent_app_date] => 2020-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8129 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16849713 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/849713
Argon addition to remote plasma oxidation Apr 14, 2020 Issued
Array ( [id] => 16812198 [patent_doc_number] => 20210134753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/848446 [patent_app_country] => US [patent_app_date] => 2020-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9582 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16848446 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/848446
Semiconductor device and method of manufacturing semiconductor device Apr 13, 2020 Issued
Array ( [id] => 16211056 [patent_doc_number] => 20200244046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => MANUFACTURABLE RGB LASER DIODE SOURCE AND SYSTEM [patent_app_type] => utility [patent_app_number] => 16/844299 [patent_app_country] => US [patent_app_date] => 2020-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 45874 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16844299 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/844299
Manufacturable RGB laser diode source and system Apr 8, 2020 Issued
Array ( [id] => 17159034 [patent_doc_number] => 20210320085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/845045 [patent_app_country] => US [patent_app_date] => 2020-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16845045 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/845045
SEMICONDUCTOR PACKAGE Apr 8, 2020 Abandoned
Array ( [id] => 17310253 [patent_doc_number] => 11211380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/838332 [patent_app_country] => US [patent_app_date] => 2020-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 7364 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16838332 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/838332
Semiconductor structure and manufacturing method thereof Apr 1, 2020 Issued
Array ( [id] => 16180560 [patent_doc_number] => 20200227529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => PLATE DESIGN TO DECREASE NOISE IN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/837444 [patent_app_country] => US [patent_app_date] => 2020-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16837444 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/837444
Plate design to decrease noise in semiconductor devices Mar 31, 2020 Issued
Array ( [id] => 17063286 [patent_doc_number] => 11107899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Plate design to decrease noise in semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/837401 [patent_app_country] => US [patent_app_date] => 2020-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 67 [patent_no_of_words] => 10480 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16837401 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/837401
Plate design to decrease noise in semiconductor devices Mar 31, 2020 Issued
Array ( [id] => 17145279 [patent_doc_number] => 20210313292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/836934 [patent_app_country] => US [patent_app_date] => 2020-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16836934 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/836934
Semiconductor package and method for manufacturing the same Mar 31, 2020 Issued
Array ( [id] => 16601621 [patent_doc_number] => 20210028152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => SEMICONDUCTOR PACKAGE HAVING STACKED SEMICONDUCTOR CHIPS [patent_app_type] => utility [patent_app_number] => 16/833761 [patent_app_country] => US [patent_app_date] => 2020-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16833761 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/833761
Semiconductor package having stacked semiconductor chips Mar 29, 2020 Issued
Array ( [id] => 17130370 [patent_doc_number] => 20210305139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => PACKAGED ELECTRONIC DEVICE WITH SPLIT DIE PAD IN ROBUST PACKAGE SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/831503 [patent_app_country] => US [patent_app_date] => 2020-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6685 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16831503 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/831503
Packaged electronic device with split die pad in robust package substrate Mar 25, 2020 Issued
Array ( [id] => 16327310 [patent_doc_number] => 20200298275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => CAPACITIVE MICROMACHINED ULTRASONIC TRANSDUCER AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/822018 [patent_app_country] => US [patent_app_date] => 2020-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5037 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16822018 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/822018
Capacitive micromachined ultrasonic transducer and method of fabricating the same Mar 17, 2020 Issued
Array ( [id] => 16163071 [patent_doc_number] => 20200219768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => Method Of Forming Self-Aligned Via [patent_app_type] => utility [patent_app_number] => 16/817983 [patent_app_country] => US [patent_app_date] => 2020-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16817983 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/817983
Method of forming self-aligned via Mar 12, 2020 Issued
Array ( [id] => 16545066 [patent_doc_number] => 20200411481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING VERTICALLY STACKED SEMICONDUCTOR DIES [patent_app_type] => utility [patent_app_number] => 16/818883 [patent_app_country] => US [patent_app_date] => 2020-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4623 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16818883 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/818883
Semiconductor device including vertically stacked semiconductor dies Mar 12, 2020 Issued
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