Mohammed S Haque
Examiner (ID: 15293)
Most Active Art Unit | 2186 |
Art Unit(s) | 2186 |
Total Applications | 6 |
Issued Applications | 4 |
Pending Applications | 0 |
Abandoned Applications | 2 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 11021332
[patent_doc_number] => 20160218287
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-28
[patent_title] => '3D PRINTED ACTIVE ELECTRONIC MATERIALS AND DEVICES'
[patent_app_type] => utility
[patent_app_number] => 15/003198
[patent_app_country] => US
[patent_app_date] => 2016-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6699
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15003198
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/003198 | 3D printed active electronic materials and devices | Jan 20, 2016 | Issued |
Array
(
[id] => 11564793
[patent_doc_number] => 09627389
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-04-18
[patent_title] => 'Methods to form merged spacers for use in fin generation in IC devices'
[patent_app_type] => utility
[patent_app_number] => 15/003304
[patent_app_country] => US
[patent_app_date] => 2016-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 27
[patent_no_of_words] => 5463
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15003304
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/003304 | Methods to form merged spacers for use in fin generation in IC devices | Jan 20, 2016 | Issued |
Array
(
[id] => 11432345
[patent_doc_number] => 09570672
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-14
[patent_title] => 'Method of making current sensors'
[patent_app_type] => utility
[patent_app_number] => 15/003608
[patent_app_country] => US
[patent_app_date] => 2016-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 1596
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15003608
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/003608 | Method of making current sensors | Jan 20, 2016 | Issued |
Array
(
[id] => 12208295
[patent_doc_number] => 20180053521
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-02-22
[patent_title] => 'STORAGE DEVICE, STORAGE APPARATUS, MAGNETIC HEAD, AND ELECTRONIC APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 15/553848
[patent_app_country] => US
[patent_app_date] => 2016-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 12082
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15553848
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/553848 | Storage device, storage apparatus, magnetic head, and electronic apparatus | Jan 17, 2016 | Issued |
Array
(
[id] => 11817828
[patent_doc_number] => 09721786
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-01
[patent_title] => 'Sulfur-containing thin films'
[patent_app_type] => utility
[patent_app_number] => 14/992942
[patent_app_country] => US
[patent_app_date] => 2016-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 16119
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14992942
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/992942 | Sulfur-containing thin films | Jan 10, 2016 | Issued |
Array
(
[id] => 11925503
[patent_doc_number] => 09793090
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-17
[patent_title] => 'E-beam inspection apparatus and method of using the same on various integrated circuit chips'
[patent_app_type] => utility
[patent_app_number] => 14/989729
[patent_app_country] => US
[patent_app_date] => 2016-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 4377
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14989729
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/989729 | E-beam inspection apparatus and method of using the same on various integrated circuit chips | Jan 5, 2016 | Issued |
Array
(
[id] => 11279636
[patent_doc_number] => 09496119
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-11-15
[patent_title] => 'E-beam inspection apparatus and method of using the same on various integrated circuit chips'
[patent_app_type] => utility
[patent_app_number] => 14/989743
[patent_app_country] => US
[patent_app_date] => 2016-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 5867
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 319
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14989743
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/989743 | E-beam inspection apparatus and method of using the same on various integrated circuit chips | Jan 5, 2016 | Issued |
Array
(
[id] => 11671891
[patent_doc_number] => 20170160612
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-08
[patent_title] => 'THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/907308
[patent_app_country] => US
[patent_app_date] => 2015-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3165
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14907308
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/907308 | THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF | Dec 29, 2015 | Abandoned |
Array
(
[id] => 11103965
[patent_doc_number] => 20160300935
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-13
[patent_title] => 'SEMICONDUCTOR-ON-INSULATOR (SOI) LATERAL HETEROJUNCTION BIPOLAR TRANSISTOR HAVING AN EPITAXIALLY GROWN BASE'
[patent_app_type] => utility
[patent_app_number] => 14/984575
[patent_app_country] => US
[patent_app_date] => 2015-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7206
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14984575
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/984575 | Semiconductor-on-insulator (SOI) lateral heterojunction bipolar transistor having an epitaxially grown base | Dec 29, 2015 | Issued |
Array
(
[id] => 10977934
[patent_doc_number] => 20160174877
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-23
[patent_title] => 'System and Method for Detecting Body Movement'
[patent_app_type] => utility
[patent_app_number] => 14/977798
[patent_app_country] => US
[patent_app_date] => 2015-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3621
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14977798
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/977798 | System and Method for Detecting Body Movement | Dec 21, 2015 | Abandoned |
Array
(
[id] => 11048728
[patent_doc_number] => 20160245686
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-08-25
[patent_title] => 'FAULT DETECTION IN ROTOR DRIVEN EQUIPMENT USING ROTATIONAL INVARIANT TRANSFORM OF SUB-SAMPLED 3-AXIS VIBRATIONAL DATA'
[patent_app_type] => utility
[patent_app_number] => 14/977675
[patent_app_country] => US
[patent_app_date] => 2015-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7016
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14977675
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/977675 | FAULT DETECTION IN ROTOR DRIVEN EQUIPMENT USING ROTATIONAL INVARIANT TRANSFORM OF SUB-SAMPLED 3-AXIS VIBRATIONAL DATA | Dec 21, 2015 | Abandoned |
Array
(
[id] => 11694548
[patent_doc_number] => 20170170265
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-15
[patent_title] => 'THICK GATE OXIDE FET INTEGRATED WITH FDSOI WITHOUT ADDITIONAL THICK OXIDE FORMATION'
[patent_app_type] => utility
[patent_app_number] => 14/968592
[patent_app_country] => US
[patent_app_date] => 2015-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3307
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968592
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/968592 | THICK GATE OXIDE FET INTEGRATED WITH FDSOI WITHOUT ADDITIONAL THICK OXIDE FORMATION | Dec 13, 2015 | Abandoned |
Array
(
[id] => 12478005
[patent_doc_number] => 09991256
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-06-05
[patent_title] => Semiconductor structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 14/968468
[patent_app_country] => US
[patent_app_date] => 2015-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 27
[patent_no_of_words] => 6553
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968468
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/968468 | Semiconductor structure and manufacturing method thereof | Dec 13, 2015 | Issued |
Array
(
[id] => 11694360
[patent_doc_number] => 20170170077
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-15
[patent_title] => 'FABRICATION OF HIGHER-K DIELECTRICS'
[patent_app_type] => utility
[patent_app_number] => 14/967914
[patent_app_country] => US
[patent_app_date] => 2015-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3576
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14967914
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/967914 | Fabrication of higher-K dielectrics | Dec 13, 2015 | Issued |
Array
(
[id] => 11694427
[patent_doc_number] => 20170170145
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-15
[patent_title] => 'SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/968517
[patent_app_country] => US
[patent_app_date] => 2015-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 12828
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968517
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/968517 | Semiconductor structure and manufacturing method thereof | Dec 13, 2015 | Issued |
Array
(
[id] => 13950739
[patent_doc_number] => 10211148
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-19
[patent_title] => Structural enhancement of Cu nanowires
[patent_app_type] => utility
[patent_app_number] => 14/968570
[patent_app_country] => US
[patent_app_date] => 2015-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 3351
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968570
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/968570 | Structural enhancement of Cu nanowires | Dec 13, 2015 | Issued |
Array
(
[id] => 10993135
[patent_doc_number] => 20160190081
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-30
[patent_title] => 'DISPLAY DEVICE AND ARRAY SUBSTRATE FOR DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/968534
[patent_app_country] => US
[patent_app_date] => 2015-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4301
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968534
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/968534 | Display device and array substrate for display device | Dec 13, 2015 | Issued |
Array
(
[id] => 12027063
[patent_doc_number] => 20170317162
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-02
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 15/518616
[patent_app_country] => US
[patent_app_date] => 2015-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5199
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15518616
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/518616 | Semiconductor device and manufacturing method thereof | Dec 10, 2015 | Issued |
Array
(
[id] => 15471895
[patent_doc_number] => 10551819
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-02-04
[patent_title] => Automated multi-silo aggregate management
[patent_app_type] => utility
[patent_app_number] => 14/965393
[patent_app_country] => US
[patent_app_date] => 2015-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 5007
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14965393
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/965393 | Automated multi-silo aggregate management | Dec 9, 2015 | Issued |
Array
(
[id] => 10740780
[patent_doc_number] => 20160086931
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-24
[patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 14/957567
[patent_app_country] => US
[patent_app_date] => 2015-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 21341
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14957567
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/957567 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE | Dec 1, 2015 | Abandoned |