Search

Mohammed S Haque

Examiner (ID: 15293)

Most Active Art Unit
2186
Art Unit(s)
2186
Total Applications
6
Issued Applications
4
Pending Applications
0
Abandoned Applications
2

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10817452 [patent_doc_number] => 20160163614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/673883 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5174 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14673883 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/673883
Package structure and manufacturing method thereof Mar 30, 2015 Issued
Array ( [id] => 10817423 [patent_doc_number] => 20160163585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'METHODS OF FORMING SELF-ALIGNED CONTACT STRUCTURES ON SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES' [patent_app_type] => utility [patent_app_number] => 14/674460 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6534 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14674460 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/674460
Methods of forming self-aligned contact structures on semiconductor devices and the resulting devices Mar 30, 2015 Issued
Array ( [id] => 14174801 [patent_doc_number] => 10261409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => Mask blank, method for manufacturing transfer mask, and method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 15/300376 [patent_app_country] => US [patent_app_date] => 2015-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 15950 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15300376 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/300376
Mask blank, method for manufacturing transfer mask, and method for manufacturing semiconductor device Mar 29, 2015 Issued
14/668679 Structures and Fabrication Methods of Flexible Thermoelectric Devices Mar 24, 2015 Abandoned
Array ( [id] => 10294503 [patent_doc_number] => 20150179502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'Two-Step Shallow Trench Isolation (STI) Process' [patent_app_type] => utility [patent_app_number] => 14/640991 [patent_app_country] => US [patent_app_date] => 2015-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2913 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14640991 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/640991
Two-step shallow trench isolation (STI) process Mar 5, 2015 Issued
Array ( [id] => 10747387 [patent_doc_number] => 20160093538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-31 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/638443 [patent_app_country] => US [patent_app_date] => 2015-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4616 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14638443 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/638443
Method of manufacturing semiconductor device Mar 3, 2015 Issued
Array ( [id] => 11253124 [patent_doc_number] => 09478639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-25 [patent_title] => 'Electrode-aligned selective epitaxy method for vertical power devices' [patent_app_type] => utility [patent_app_number] => 14/633359 [patent_app_country] => US [patent_app_date] => 2015-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 28 [patent_no_of_words] => 4042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14633359 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/633359
Electrode-aligned selective epitaxy method for vertical power devices Feb 26, 2015 Issued
Array ( [id] => 12012851 [patent_doc_number] => 09806175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-31 [patent_title] => 'Power MOSFET device structure for high frequency applications' [patent_app_type] => utility [patent_app_number] => 14/629229 [patent_app_country] => US [patent_app_date] => 2015-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 41 [patent_no_of_words] => 5551 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14629229 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/629229
Power MOSFET device structure for high frequency applications Feb 22, 2015 Issued
Array ( [id] => 11048320 [patent_doc_number] => 20160245279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'REAL TIME MACHINE LEARNING BASED PREDICTIVE AND PREVENTIVE MAINTENANCE OF VACUUM PUMP' [patent_app_type] => utility [patent_app_number] => 14/628322 [patent_app_country] => US [patent_app_date] => 2015-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 5183 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14628322 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/628322
REAL TIME MACHINE LEARNING BASED PREDICTIVE AND PREVENTIVE MAINTENANCE OF VACUUM PUMP Feb 22, 2015 Abandoned
Array ( [id] => 10518973 [patent_doc_number] => 09246029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-26 [patent_title] => 'Method for manufacturing an interdigitated back contact solar cell' [patent_app_type] => utility [patent_app_number] => 14/627350 [patent_app_country] => US [patent_app_date] => 2015-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 41 [patent_no_of_words] => 9537 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14627350 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/627350
Method for manufacturing an interdigitated back contact solar cell Feb 19, 2015 Issued
Array ( [id] => 11050715 [patent_doc_number] => 20160247674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'SELF-ALIGNED PROCESS USING VARIABLE-FLUIDITY MATERIAL' [patent_app_type] => utility [patent_app_number] => 14/626652 [patent_app_country] => US [patent_app_date] => 2015-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7610 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14626652 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/626652
Self-aligned process using variable-fluidity material Feb 18, 2015 Issued
Array ( [id] => 11043411 [patent_doc_number] => 20160240367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'METHOD FOR FORMING FILM HAVING LOW RESISTANCE AND SHALLOW JUNCTION DEPTH' [patent_app_type] => utility [patent_app_number] => 14/622603 [patent_app_country] => US [patent_app_date] => 2015-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7702 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14622603 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/622603
Method for forming film having low resistance and shallow junction depth Feb 12, 2015 Issued
Array ( [id] => 11539433 [patent_doc_number] => 09613848 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-04 [patent_title] => 'Dielectric structures with negative taper and methods of formation thereof' [patent_app_type] => utility [patent_app_number] => 14/621082 [patent_app_country] => US [patent_app_date] => 2015-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 4671 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14621082 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/621082
Dielectric structures with negative taper and methods of formation thereof Feb 11, 2015 Issued
Array ( [id] => 11239920 [patent_doc_number] => 09466566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-11 [patent_title] => 'Stacked bit line dual word line nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 14/618839 [patent_app_country] => US [patent_app_date] => 2015-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 8327 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14618839 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/618839
Stacked bit line dual word line nonvolatile memory Feb 9, 2015 Issued
Array ( [id] => 10758565 [patent_doc_number] => 20160104718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-14 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/616812 [patent_app_country] => US [patent_app_date] => 2015-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9083 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14616812 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/616812
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Feb 8, 2015 Abandoned
Array ( [id] => 10378173 [patent_doc_number] => 20150263180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'WIDE BANDGAP SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/617111 [patent_app_country] => US [patent_app_date] => 2015-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6982 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14617111 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/617111
Wide bandgap semiconductor device Feb 8, 2015 Issued
Array ( [id] => 10350922 [patent_doc_number] => 20150235927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/616711 [patent_app_country] => US [patent_app_date] => 2015-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2525 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14616711 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/616711
Integrated circuit package Feb 7, 2015 Issued
Array ( [id] => 10350924 [patent_doc_number] => 20150235929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'ELECTRONIC DEVICE WITH HEAT DISSIPATER' [patent_app_type] => utility [patent_app_number] => 14/615673 [patent_app_country] => US [patent_app_date] => 2015-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3540 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14615673 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/615673
Electronic device with heat dissipater Feb 5, 2015 Issued
Array ( [id] => 11246482 [patent_doc_number] => 09472531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Device packaging facility and method, and device processing apparatus utilizing phthalate' [patent_app_type] => utility [patent_app_number] => 14/616029 [patent_app_country] => US [patent_app_date] => 2015-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 43 [patent_no_of_words] => 9274 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14616029 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/616029
Device packaging facility and method, and device processing apparatus utilizing phthalate Feb 5, 2015 Issued
Array ( [id] => 11658642 [patent_doc_number] => 09671635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-06 [patent_title] => 'Electro-optic display backplane structures with drive components and pixel electrodes on opposed surfaces' [patent_app_type] => utility [patent_app_number] => 14/615617 [patent_app_country] => US [patent_app_date] => 2015-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7779 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14615617 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/615617
Electro-optic display backplane structures with drive components and pixel electrodes on opposed surfaces Feb 5, 2015 Issued
Menu