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Mohammed S Haque

Examiner (ID: 15293)

Most Active Art Unit
2186
Art Unit(s)
2186
Total Applications
6
Issued Applications
4
Pending Applications
0
Abandoned Applications
2

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18061796 [patent_doc_number] => 20220392883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/682952 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6936 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17682952 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/682952
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Feb 27, 2022 Pending
Array ( [id] => 18600267 [patent_doc_number] => 20230275068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => MEMORY STACKED ON PROCESSOR FOR HIGH BANDWIDTH [patent_app_type] => utility [patent_app_number] => 17/683290 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17683290 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/683290
MEMORY STACKED ON PROCESSOR FOR HIGH BANDWIDTH Feb 27, 2022 Pending
Array ( [id] => 18465861 [patent_doc_number] => 11690172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => LED lighting systems and methods [patent_app_type] => utility [patent_app_number] => 17/681279 [patent_app_country] => US [patent_app_date] => 2022-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 74 [patent_no_of_words] => 23181 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17681279 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/681279
LED lighting systems and methods Feb 24, 2022 Issued
Array ( [id] => 18267981 [patent_doc_number] => 20230089223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/681487 [patent_app_country] => US [patent_app_date] => 2022-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8743 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17681487 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/681487
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Feb 24, 2022 Pending
Array ( [id] => 17644767 [patent_doc_number] => 20220172506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => INTEGRATED PIEZOELECTRIC MICROELECTROMECHANICAL ULTRASOUND TRANSDUCER (PMUT) ON INTEGRATED CIRCUIT (IC) FOR FINGERPRINT SENSING [patent_app_type] => utility [patent_app_number] => 17/675832 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17059 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17675832 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/675832
Integrated piezoelectric microelectromechanical ultrasound transducer (PMUT) on integrated circuit (IC) for fingerprint sensing Feb 17, 2022 Issued
Array ( [id] => 18585934 [patent_doc_number] => 20230268198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => HYBRID MOLD CHASE SURFACE FOR SEMICONDUCTOR BONDING AND RELATED SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 17/675949 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7654 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17675949 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/675949
HYBRID MOLD CHASE SURFACE FOR SEMICONDUCTOR BONDING AND RELATED SYSTEMS AND METHODS Feb 17, 2022 Pending
Array ( [id] => 18230482 [patent_doc_number] => 20230069476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => THREE-DIMENSIONAL BONDING SCHEME AND ASSOCIATED SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 17/592065 [patent_app_country] => US [patent_app_date] => 2022-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17592065 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/592065
THREE-DIMENSIONAL BONDING SCHEME AND ASSOCIATED SYSTEMS AND METHODS Feb 2, 2022 Pending
Array ( [id] => 18230214 [patent_doc_number] => 20230069208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => CONDUCTIVE ORGANIC MODULE FOR SEMICONDUCTOR DEVICES AND ASSOCIATED SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 17/592029 [patent_app_country] => US [patent_app_date] => 2022-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6806 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17592029 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/592029
CONDUCTIVE ORGANIC MODULE FOR SEMICONDUCTOR DEVICES AND ASSOCIATED SYSTEMS AND METHODS Feb 2, 2022 Pending
Array ( [id] => 18540889 [patent_doc_number] => 20230246000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => Semiconductor Device With Unbalanced Die Stackup [patent_app_type] => utility [patent_app_number] => 17/649614 [patent_app_country] => US [patent_app_date] => 2022-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17649614 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/649614
Semiconductor device with unbalanced die stackup Jan 31, 2022 Issued
Array ( [id] => 18514697 [patent_doc_number] => 20230230958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => EMBEDDED TRANSISTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/578873 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21121 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17578873 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/578873
EMBEDDED TRANSISTOR DEVICES Jan 18, 2022 Pending
Array ( [id] => 17583029 [patent_doc_number] => 20220139884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => HIGH CONNECTIVITY DEVICE STACKING [patent_app_type] => utility [patent_app_number] => 17/578271 [patent_app_country] => US [patent_app_date] => 2022-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12946 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17578271 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/578271
High connectivity device stacking Jan 17, 2022 Issued
Array ( [id] => 17566652 [patent_doc_number] => 20220130801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => SEMICONDUCTOR PACKAGE HAVING STACKED SEMICONDUCTOR CHIPS [patent_app_type] => utility [patent_app_number] => 17/568558 [patent_app_country] => US [patent_app_date] => 2022-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17568558 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/568558
Semiconductor package having stacked semiconductor chips Jan 3, 2022 Issued
Array ( [id] => 17708725 [patent_doc_number] => 20220208733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => Chip Package and Method of Forming Chip Packages [patent_app_type] => utility [patent_app_number] => 17/566661 [patent_app_country] => US [patent_app_date] => 2021-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17566661 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/566661
Chip Package and Method of Forming Chip Packages Dec 29, 2021 Pending
Array ( [id] => 18578927 [patent_doc_number] => 11735467 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Airgap formation processes [patent_app_type] => utility [patent_app_number] => 17/558848 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 7865 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558848 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558848
Airgap formation processes Dec 21, 2021 Issued
Array ( [id] => 18608233 [patent_doc_number] => 11749712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => High dielectric constant material at locations of high fields [patent_app_type] => utility [patent_app_number] => 17/556258 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 4562 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17556258 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/556258
High dielectric constant material at locations of high fields Dec 19, 2021 Issued
Array ( [id] => 17536823 [patent_doc_number] => 20220115432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => IMAGE SENSOR FOR HIGH PHOTOELECTRIC CONVERSION EFFICIENCY AND LOW DARK CURRENT [patent_app_type] => utility [patent_app_number] => 17/555977 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9566 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17555977 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/555977
Image sensor for high photoelectric conversion efficiency and low dark current Dec 19, 2021 Issued
Array ( [id] => 18456381 [patent_doc_number] => 20230197663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => METHOD OF PROCESSING A SEMICONDUCTOR WAFER, SEMICONDUCTOR DIE, AND METHOD OF PRODUCING A SEMICONDUCTOR MODULE [patent_app_type] => utility [patent_app_number] => 17/555709 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4487 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17555709 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/555709
METHOD OF PROCESSING A SEMICONDUCTOR WAFER, SEMICONDUCTOR DIE, AND METHOD OF PRODUCING A SEMICONDUCTOR MODULE Dec 19, 2021 Pending
Array ( [id] => 18562988 [patent_doc_number] => 11728241 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Power device embedded driver board assemblies with cooling structures and methods thereof [patent_app_type] => utility [patent_app_number] => 17/554638 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17554638 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/554638
Power device embedded driver board assemblies with cooling structures and methods thereof Dec 16, 2021 Issued
Array ( [id] => 17693318 [patent_doc_number] => 20220200611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => FIELD PROGRAMMABLE PLATFORM ARRAY [patent_app_type] => utility [patent_app_number] => 17/552336 [patent_app_country] => US [patent_app_date] => 2021-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2965 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17552336 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/552336
FIELD PROGRAMMABLE PLATFORM ARRAY Dec 14, 2021 Pending
Array ( [id] => 17692288 [patent_doc_number] => 20220199581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => MULTI-DIE PACKAGE STRUCTURE AND MULTI-DIE CO-PACKING METHOD [patent_app_type] => utility [patent_app_number] => 17/544075 [patent_app_country] => US [patent_app_date] => 2021-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3372 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17544075 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/544075
MULTI-DIE PACKAGE STRUCTURE AND MULTI-DIE CO-PACKING METHOD Dec 6, 2021 Pending
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