Mohammed S Haque

Array ( [id] => 10270263 [patent_doc_number] => 20150155260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-04 [patent_title] => 'Temporary Bonding Scheme' [patent_app_type] => utility [patent_app_number] => 14/097054 [patent_app_country] => US [patent_app_date] => 2013-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1805 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097054 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10262883 [patent_doc_number] => 20150147880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-28 [patent_title] => 'CONTACT STRUCTURE AND FORMATION THEREOF' [patent_app_type] => utility [patent_app_number] => 14/091508 [patent_app_country] => US [patent_app_date] => 2013-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4912 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14091508 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9989520 [patent_doc_number] => 09034723 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-05-19 [patent_title] => 'Method of making a FinFET device' [patent_app_type] => utility [patent_app_number] => 14/088861 [patent_app_country] => US [patent_app_date] => 2013-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4445 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14088861 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10004275 [patent_doc_number] => 09048374 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-06-02 [patent_title] => 'Method for manufacturing an interdigitated back contact solar cell' [patent_app_type] => utility [patent_app_number] => 14/084982 [patent_app_country] => US [patent_app_date] => 2013-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 41 [patent_no_of_words] => 9602 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14084982 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10053501 [patent_doc_number] => 09093386 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Spacer-damage-free etching' [patent_app_type] => utility [patent_app_number] => 14/084744 [patent_app_country] => US [patent_app_date] => 2013-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 31 [patent_no_of_words] => 6499 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14084744 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9704606 [patent_doc_number] => 08829675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'Repairing anomalous stiff pillar bumps' [patent_app_type] => utility [patent_app_number] => 14/083962 [patent_app_country] => US [patent_app_date] => 2013-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 35 [patent_no_of_words] => 18606 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14083962 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10255804 [patent_doc_number] => 20150140800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/082200 [patent_app_country] => US [patent_app_date] => 2013-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4406 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14082200 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9677513 [patent_doc_number] => 08816424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 14/075901 [patent_app_country] => US [patent_app_date] => 2013-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 9189 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14075901 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10010653 [patent_doc_number] => 09054182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Semiconductor device with field electrode and method' [patent_app_type] => utility [patent_app_number] => 14/068583 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2966 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14068583 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10898760 [patent_doc_number] => 08921982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-30 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/068666 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 38 [patent_no_of_words] => 9644 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14068666 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10093136 [patent_doc_number] => 09129966 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-08 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/052064 [patent_app_country] => US [patent_app_date] => 2013-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4028 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14052064 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10004312 [patent_doc_number] => 09048411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-02 [patent_title] => 'Multilayers having reduced perpendicular demagnetizing field using moment dilution for spintronic applications' [patent_app_type] => utility [patent_app_number] => 14/047130 [patent_app_country] => US [patent_app_date] => 2013-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7823 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14047130 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10563722 [patent_doc_number] => 09287404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-15 [patent_title] => 'Semiconductor device and method of manufacturing a semiconductor device with lateral FET cells and field plates' [patent_app_type] => utility [patent_app_number] => 14/044001 [patent_app_country] => US [patent_app_date] => 2013-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 64 [patent_no_of_words] => 12702 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14044001 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10112257 [patent_doc_number] => 09147676 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-29 [patent_title] => 'SCRs with checker board layouts' [patent_app_type] => utility [patent_app_number] => 14/044601 [patent_app_country] => US [patent_app_date] => 2013-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 3776 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14044601 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10132085 [patent_doc_number] => 09165926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-20 [patent_title] => 'Dynamic threshold MOS and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 14/044665 [patent_app_country] => US [patent_app_date] => 2013-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 3846 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14044665 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10206105 [patent_doc_number] => 20150091093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'INTEGRATED CIRCUITS WITH DUAL SILICIDE CONTACTS AND METHODS FOR FABRICATING SAME' [patent_app_type] => utility [patent_app_number] => 14/043017 [patent_app_country] => US [patent_app_date] => 2013-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14043017 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10206188 [patent_doc_number] => 20150091176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'Electronic Component, Arrangement and Method' [patent_app_type] => utility [patent_app_number] => 14/043185 [patent_app_country] => US [patent_app_date] => 2013-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8812 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14043185 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10206148 [patent_doc_number] => 20150091136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'ZENER DIODE HAVIING A POLYSILICON LAYER FOR IMPROVED REVERSE SURGE CAPABILITY AND DECREASED LEAKAGE CURRENT' [patent_app_type] => utility [patent_app_number] => 14/043431 [patent_app_country] => US [patent_app_date] => 2013-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2643 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14043431 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10205968 [patent_doc_number] => 20150090956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'ENGINEERED SUBSTRATE ASSEMBLIES WITH THERMALLY OPAQUE MATERIALS, AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS' [patent_app_type] => utility [patent_app_number] => 14/043544 [patent_app_country] => US [patent_app_date] => 2013-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5263 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14043544 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10206077 [patent_doc_number] => 20150091064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => '3D SEMICONDUCTOR DEVICE AND 3D LOGIC ARRAY STRUCTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 14/042776 [patent_app_country] => US [patent_app_date] => 2013-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5800 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14042776 [rel_patent_id] =>[rel_patent_doc_number] =>)