Mohammed S Haque
Examiner (ID: 15293)
Most Active Art Unit | 2186 |
Art Unit(s) | 2186 |
Total Applications | 6 |
Issued Applications | 4 |
Pending Applications | 0 |
Abandoned Applications | 2 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
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[id] => 8989913
[patent_doc_number] => 20130217194
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[patent_title] => 'MOS TRANSISTOR, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR DEVICE'
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[patent_app_number] => 13/761326
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Array
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[patent_title] => 'Stress in trigate devices using complimentary gate fill materials'
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[patent_app_number] => 13/750393
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/750393 | Stress in trigate devices using complimentary gate fill materials | Jan 24, 2013 | Issued |
Array
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[patent_issue_date] => 2016-02-09
[patent_title] => 'Light-emitting diode chip'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/371722 | Light-emitting diode chip | Jan 14, 2013 | Issued |
Array
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Array
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[patent_title] => 'Image pickup device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/725336 | Image pickup device | Dec 20, 2012 | Issued |
Array
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[patent_title] => 'Single sided, flat, no lead, integrated circuit package'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/724894 | Single sided, flat, no lead, integrated circuit package | Dec 20, 2012 | Issued |
Array
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[id] => 8888624
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[patent_kind] => A1
[patent_issue_date] => 2013-06-27
[patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE'
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[patent_app_number] => 13/724606
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/724606 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE | Dec 20, 2012 | Abandoned |
Array
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[id] => 10946410
[patent_doc_number] => 20140349431
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[patent_kind] => A1
[patent_issue_date] => 2014-11-27
[patent_title] => 'PROCESS AND MATERIALS FOR MAKING CONTAINED LAYERS AND DEVICES MADE WITH SAME'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/367426 | Process and materials for making contained layers and devices made with same | Dec 19, 2012 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/718636 | Semiconductor packages including through electrodes and methods of manufacturing the same | Dec 17, 2012 | Issued |
Array
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[id] => 9542596
[patent_doc_number] => 20140167243
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[patent_issue_date] => 2014-06-19
[patent_title] => 'SEMICONDUCTOR PACKAGES USING A CHIP CONSTRAINT MEANS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/712977 | SEMICONDUCTOR PACKAGES USING A CHIP CONSTRAINT MEANS | Dec 12, 2012 | Abandoned |
Array
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[id] => 9534580
[patent_doc_number] => 20140159226
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Array
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[id] => 9534474
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/706002 | Backside CMOS compatible bioFET with no plasma induced damage | Dec 4, 2012 | Issued |
Array
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Array
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Array
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