Mohammed S Haque

Array ( [id] => 18282029 [patent_doc_number] => 20230097501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => MEMORY DEVICE AND PREPARATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/542419 [patent_app_country] => US [patent_app_date] => 2021-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8988 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17542419 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17660831 [patent_doc_number] => 20220181296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => Method for Forming Chip Packages and a Chip Package [patent_app_type] => utility [patent_app_number] => 17/542416 [patent_app_country] => US [patent_app_date] => 2021-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17542416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17676636 [patent_doc_number] => 20220189803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => SENSOR CONFIGURATION FOR PROCESS CONDITION MEASURING DEVICES [patent_app_type] => utility [patent_app_number] => 17/542135 [patent_app_country] => US [patent_app_date] => 2021-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17542135 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17660931 [patent_doc_number] => 20220181396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => Electroluminescence Display Apparatus [patent_app_type] => utility [patent_app_number] => 17/541986 [patent_app_country] => US [patent_app_date] => 2021-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12493 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17541986 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17615502 [patent_doc_number] => 20220157782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => Fully Interconnected Heterogeneous Multi-layer Reconstructed Silicon Device [patent_app_type] => utility [patent_app_number] => 17/457350 [patent_app_country] => US [patent_app_date] => 2021-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4519 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17457350 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18408873 [patent_doc_number] => 20230170226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => SEMICONDUCTOR PACKAGE WITH METAL POSTS FROM STRUCTURED LEADFRAME [patent_app_type] => utility [patent_app_number] => 17/536538 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8797 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536538 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19428303 [patent_doc_number] => 12087737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Method of forming chip package having stacked chips [patent_app_type] => utility [patent_app_number] => 17/535987 [patent_app_country] => US [patent_app_date] => 2021-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 5326 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17535987 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17645335 [patent_doc_number] => 20220173074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => Chip Package and Method of Forming Chip Packages [patent_app_type] => utility [patent_app_number] => 17/535985 [patent_app_country] => US [patent_app_date] => 2021-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8426 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17535985 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18827693 [patent_doc_number] => 11842983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-12 [patent_title] => Semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/525641 [patent_app_country] => US [patent_app_date] => 2021-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 42 [patent_no_of_words] => 12184 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17525641 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17917933 [patent_doc_number] => 20220320329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/517941 [patent_app_country] => US [patent_app_date] => 2021-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9690 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17517941 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18280009 [patent_doc_number] => 20230095481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => LAYOUT OF INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/517642 [patent_app_country] => US [patent_app_date] => 2021-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17517642 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18326087 [patent_doc_number] => 20230124215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => MULTIPLE SILICIDE PROCESS FOR SEPARATELY FORMING N-TYPE AND P-TYPE OHMIC CONTACTS AND RELATED DEVICES [patent_app_type] => utility [patent_app_number] => 17/505744 [patent_app_country] => US [patent_app_date] => 2021-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10618 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17505744 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18326805 [patent_doc_number] => 20230124933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => ELECTRONIC PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/501952 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501952 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18857597 [patent_doc_number] => 11855194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/500149 [patent_app_country] => US [patent_app_date] => 2021-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 71 [patent_no_of_words] => 31855 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17500149 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17787848 [patent_doc_number] => 11410984 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-09 [patent_title] => Three dimensional integrated circuit with lateral connection layer [patent_app_type] => utility [patent_app_number] => 17/497804 [patent_app_country] => US [patent_app_date] => 2021-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 12946 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17497804 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18782240 [patent_doc_number] => 11824006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 17/492788 [patent_app_country] => US [patent_app_date] => 2021-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10733 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17492788 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17417320 [patent_doc_number] => 20220052224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => LIGHT-EMITTING DIODE, MANUFACTURING METHOD THEREOF AND DISPLAY [patent_app_type] => utility [patent_app_number] => 17/488890 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8572 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488890 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18562983 [patent_doc_number] => 11728236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Three-dimensional memory devices having hydrogen blocking layer and fabrication methods thereof [patent_app_type] => utility [patent_app_number] => 17/482361 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 12519 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17482361 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18268716 [patent_doc_number] => 20230089958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => DISSIPATION OF HEAT FROM A SEMICONDUCTOR CHIP [patent_app_type] => utility [patent_app_number] => 17/482347 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17482347 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18521047 [patent_doc_number] => 11710944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Manufacturable RGB laser diode source and system [patent_app_type] => utility [patent_app_number] => 17/477016 [patent_app_country] => US [patent_app_date] => 2021-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 48 [patent_no_of_words] => 45887 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17477016 [rel_patent_id] =>[rel_patent_doc_number] =>)