Search

Mohammed S Haque

Examiner (ID: 15293)

Most Active Art Unit
2186
Art Unit(s)
2186
Total Applications
6
Issued Applications
4
Pending Applications
0
Abandoned Applications
2

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5750959 [patent_doc_number] => 20060220108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Field-effect transistor in semiconductor device, method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/378414 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8884 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20060220108.pdf [firstpage_image] =>[orig_patent_app_number] => 11378414 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/378414
Field-effect transistor comprising hollow cavity Mar 19, 2006 Issued
Array ( [id] => 5217533 [patent_doc_number] => 20070158844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'Copper metalized ohmic contact electrode of compound device' [patent_app_type] => utility [patent_app_number] => 11/377302 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1746 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20070158844.pdf [firstpage_image] =>[orig_patent_app_number] => 11377302 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/377302
Copper metalized ohmic contact electrode of compound device Mar 16, 2006 Issued
Array ( [id] => 5757380 [patent_doc_number] => 20060208325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Semiconductor device with gate insulating film and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/373112 [patent_app_country] => US [patent_app_date] => 2006-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5299 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20060208325.pdf [firstpage_image] =>[orig_patent_app_number] => 11373112 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/373112
Semiconductor device with gate insulating film and manufacturing method thereof Mar 12, 2006 Abandoned
Array ( [id] => 422153 [patent_doc_number] => 07274085 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-09-25 [patent_title] => 'Capacitor structure' [patent_app_type] => utility [patent_app_number] => 11/308162 [patent_app_country] => US [patent_app_date] => 2006-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1947 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/274/07274085.pdf [firstpage_image] =>[orig_patent_app_number] => 11308162 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/308162
Capacitor structure Mar 8, 2006 Issued
Array ( [id] => 83529 [patent_doc_number] => 07741201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-22 [patent_title] => 'Semiconductor device and method of manufacturing a gate stack' [patent_app_type] => utility [patent_app_number] => 11/371082 [patent_app_country] => US [patent_app_date] => 2006-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3211 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/741/07741201.pdf [firstpage_image] =>[orig_patent_app_number] => 11371082 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/371082
Semiconductor device and method of manufacturing a gate stack Mar 8, 2006 Issued
Array ( [id] => 5680943 [patent_doc_number] => 20060197210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Stack semiconductor package formed by multiple molding and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/369443 [patent_app_country] => US [patent_app_date] => 2006-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3199 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20060197210.pdf [firstpage_image] =>[orig_patent_app_number] => 11369443 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/369443
Stack semiconductor package formed by multiple molding and method of manufacturing the same Mar 5, 2006 Issued
Array ( [id] => 5683040 [patent_doc_number] => 20060199310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Semiconductor integrated circuit and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/366552 [patent_app_country] => US [patent_app_date] => 2006-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7052 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20060199310.pdf [firstpage_image] =>[orig_patent_app_number] => 11366552 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/366552
Semiconductor integrated circuit and semiconductor device Mar 2, 2006 Abandoned
Array ( [id] => 5704929 [patent_doc_number] => 20060193977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'CMOS device featuring high breakdown voltage without failure in enhancing integration thereof, and method for manufacturing such CMOS device' [patent_app_type] => utility [patent_app_number] => 11/363252 [patent_app_country] => US [patent_app_date] => 2006-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4808 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20060193977.pdf [firstpage_image] =>[orig_patent_app_number] => 11363252 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/363252
CMOS device featuring high breakdown voltage without failure in enhancing integration thereof, and method for manufacturing such CMOS device Feb 27, 2006 Abandoned
Array ( [id] => 4577876 [patent_doc_number] => 07825396 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-02 [patent_title] => 'Self-align planerized bottom electrode phase change memory and manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/351296 [patent_app_country] => US [patent_app_date] => 2006-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4987 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/825/07825396.pdf [firstpage_image] =>[orig_patent_app_number] => 11351296 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/351296
Self-align planerized bottom electrode phase change memory and manufacturing method Feb 8, 2006 Issued
Array ( [id] => 5098677 [patent_doc_number] => 20070181937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'P-CHANNEL NON-VOLATILE MEMORY AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/307472 [patent_app_country] => US [patent_app_date] => 2006-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4617 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20070181937.pdf [firstpage_image] =>[orig_patent_app_number] => 11307472 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/307472
P-CHANNEL NON-VOLATILE MEMORY AND OPERATING METHOD THEREOF Feb 8, 2006 Abandoned
Array ( [id] => 5697521 [patent_doc_number] => 20060214205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Thin-film capacitor element and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/349121 [patent_app_country] => US [patent_app_date] => 2006-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6597 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20060214205.pdf [firstpage_image] =>[orig_patent_app_number] => 11349121 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/349121
Thin-film capacitor element and semiconductor device Feb 7, 2006 Abandoned
Array ( [id] => 45073 [patent_doc_number] => 07777263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-17 [patent_title] => 'Semiconductor integrated circuit device comprising SRAM and capacitors' [patent_app_type] => utility [patent_app_number] => 11/345311 [patent_app_country] => US [patent_app_date] => 2006-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 7691 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/777/07777263.pdf [firstpage_image] =>[orig_patent_app_number] => 11345311 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/345311
Semiconductor integrated circuit device comprising SRAM and capacitors Feb 1, 2006 Issued
Array ( [id] => 5664691 [patent_doc_number] => 20060170041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'MOSFET and optical coupling device having the same' [patent_app_type] => utility [patent_app_number] => 11/335602 [patent_app_country] => US [patent_app_date] => 2006-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2521 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20060170041.pdf [firstpage_image] =>[orig_patent_app_number] => 11335602 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/335602
MOSFET and optical coupling device having the same Jan 19, 2006 Abandoned
Array ( [id] => 113786 [patent_doc_number] => 07714364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-11 [patent_title] => 'Semiconductor device comprising gate electrode having arsenic and phosphorus' [patent_app_type] => utility [patent_app_number] => 11/333532 [patent_app_country] => US [patent_app_date] => 2006-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 6549 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/714/07714364.pdf [firstpage_image] =>[orig_patent_app_number] => 11333532 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/333532
Semiconductor device comprising gate electrode having arsenic and phosphorus Jan 17, 2006 Issued
Array ( [id] => 5640533 [patent_doc_number] => 20060278988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'Profiled contact' [patent_app_type] => utility [patent_app_number] => 11/329481 [patent_app_country] => US [patent_app_date] => 2006-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 123 [patent_figures_cnt] => 123 [patent_no_of_words] => 47548 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20060278988.pdf [firstpage_image] =>[orig_patent_app_number] => 11329481 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/329481
Profiled contact Jan 9, 2006 Issued
Array ( [id] => 322960 [patent_doc_number] => 07518193 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-14 [patent_title] => 'SRAM array and analog FET with dual-strain layers comprising relaxed regions' [patent_app_type] => utility [patent_app_number] => 11/275492 [patent_app_country] => US [patent_app_date] => 2006-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3530 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/518/07518193.pdf [firstpage_image] =>[orig_patent_app_number] => 11275492 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/275492
SRAM array and analog FET with dual-strain layers comprising relaxed regions Jan 9, 2006 Issued
Array ( [id] => 5854526 [patent_doc_number] => 20060226459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Layout structure in semiconductor memory device and layout method therefor' [patent_app_type] => utility [patent_app_number] => 11/316871 [patent_app_country] => US [patent_app_date] => 2005-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7383 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20060226459.pdf [firstpage_image] =>[orig_patent_app_number] => 11316871 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/316871
Layout structure in semiconductor memory device comprising global work lines, local work lines, global bit lines and local bit lines Dec 26, 2005 Issued
Array ( [id] => 820916 [patent_doc_number] => 07408251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-05 [patent_title] => 'Semiconductor packaging device comprising a semiconductor chip including a MOSFET' [patent_app_type] => utility [patent_app_number] => 11/312528 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 39 [patent_no_of_words] => 10221 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/408/07408251.pdf [firstpage_image] =>[orig_patent_app_number] => 11312528 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/312528
Semiconductor packaging device comprising a semiconductor chip including a MOSFET Dec 20, 2005 Issued
Array ( [id] => 5640530 [patent_doc_number] => 20060278985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'Multilevel semiconductor devices and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/312441 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6198 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20060278985.pdf [firstpage_image] =>[orig_patent_app_number] => 11312441 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/312441
Multilevel semiconductor devices and methods of manufacturing the same Dec 20, 2005 Abandoned
Array ( [id] => 5116802 [patent_doc_number] => 20070138516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-21 [patent_title] => 'Semiconductor memory device and method of manufacturing thereof' [patent_app_type] => utility [patent_app_number] => 11/304062 [patent_app_country] => US [patent_app_date] => 2005-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6330 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20070138516.pdf [firstpage_image] =>[orig_patent_app_number] => 11304062 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/304062
Semiconductor memory device with channel regions along sidewalls of fins Dec 14, 2005 Issued
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