Mohammed S Haque

Array ( [id] => 4536643 [patent_doc_number] => 07872339 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-18 [patent_title] => 'Vertically stacked pre-packaged integrated circuit chips' [patent_app_type] => utility [patent_app_number] => 10/968572 [patent_app_country] => US [patent_app_date] => 2004-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4103 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/872/07872339.pdf [firstpage_image] =>[orig_patent_app_number] => 10968572 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7206304 [patent_doc_number] => 20050258506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'Arrangement and process for protecting fuses/anti-fuses' [patent_app_type] => utility [patent_app_number] => 10/957492 [patent_app_country] => US [patent_app_date] => 2004-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1221 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20050258506.pdf [firstpage_image] =>[orig_patent_app_number] => 10957492 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6978038 [patent_doc_number] => 20050287756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Semiconductor device with resistor element and its manufacture method' [patent_app_type] => utility [patent_app_number] => 10/950451 [patent_app_country] => US [patent_app_date] => 2004-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4148 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20050287756.pdf [firstpage_image] =>[orig_patent_app_number] => 10950451 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6969742 [patent_doc_number] => 20050035452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Die-up ball grid array package including a substrate having an opening and method for making the same' [patent_app_type] => utility [patent_app_number] => 10/938955 [patent_app_country] => US [patent_app_date] => 2004-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6707 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20050035452.pdf [firstpage_image] =>[orig_patent_app_number] => 10938955 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 457673 [patent_doc_number] => 07245016 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-17 [patent_title] => 'Circuit layout structure' [patent_app_type] => utility [patent_app_number] => 10/711281 [patent_app_country] => US [patent_app_date] => 2004-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2725 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/245/07245016.pdf [firstpage_image] =>[orig_patent_app_number] => 10711281 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5817882 [patent_doc_number] => 20060022195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'SCRIBE LINE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 10/710761 [patent_app_country] => US [patent_app_date] => 2004-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1874 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20060022195.pdf [firstpage_image] =>[orig_patent_app_number] => 10710761 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7273106 [patent_doc_number] => 20040232557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Semiconductor device having a metal insulator metal capacitor' [patent_app_type] => new [patent_app_number] => 10/876481 [patent_app_country] => US [patent_app_date] => 2004-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3878 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20040232557.pdf [firstpage_image] =>[orig_patent_app_number] => 10876481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6978061 [patent_doc_number] => 20050287779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Integrated circuit structure and method of fabrication' [patent_app_type] => utility [patent_app_number] => 10/877441 [patent_app_country] => US [patent_app_date] => 2004-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3213 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20050287779.pdf [firstpage_image] =>[orig_patent_app_number] => 10877441 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7031094 [patent_doc_number] => 20050029661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Integrated circuit and associated test method' [patent_app_type] => utility [patent_app_number] => 10/839761 [patent_app_country] => US [patent_app_date] => 2004-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2929 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20050029661.pdf [firstpage_image] =>[orig_patent_app_number] => 10839761 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5691638 [patent_doc_number] => 20060151783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 10/824942 [patent_app_country] => US [patent_app_date] => 2004-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2685 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20060151783.pdf [firstpage_image] =>[orig_patent_app_number] => 10824942 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7344221 [patent_doc_number] => 20040192019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Wire-bond process flow for copper metal-six, structures achieved thereby, and testing method' [patent_app_type] => new [patent_app_number] => 10/818081 [patent_app_country] => US [patent_app_date] => 2004-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5447 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20040192019.pdf [firstpage_image] =>[orig_patent_app_number] => 10818081 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7420597 [patent_doc_number] => 20040183077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Semiconductor device, method of fabricating same, and, electrooptical device' [patent_app_type] => new [patent_app_number] => 10/815654 [patent_app_country] => US [patent_app_date] => 2004-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3135 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 26 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20040183077.pdf [firstpage_image] =>[orig_patent_app_number] => 10815654 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6949719 [patent_doc_number] => 20050224813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Light-emitting device and manufacturing process of the light-emitting device' [patent_app_type] => utility [patent_app_number] => 10/815091 [patent_app_country] => US [patent_app_date] => 2004-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2998 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20050224813.pdf [firstpage_image] =>[orig_patent_app_number] => 10815091 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 377434 [patent_doc_number] => 07312535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-25 [patent_title] => 'Semiconductor device having an anti-oxidizing layer that inhibits corrosion of an interconnect layer' [patent_app_type] => utility [patent_app_number] => 10/803832 [patent_app_country] => US [patent_app_date] => 2004-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 6928 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/312/07312535.pdf [firstpage_image] =>[orig_patent_app_number] => 10803832 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7393786 [patent_doc_number] => 20040173892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Multilayer laser trim interconnect method' [patent_app_type] => new [patent_app_number] => 10/801742 [patent_app_country] => US [patent_app_date] => 2004-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4552 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20040173892.pdf [firstpage_image] =>[orig_patent_app_number] => 10801742 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7363243 [patent_doc_number] => 20040217442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/484594 [patent_app_country] => US [patent_app_date] => 2004-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1564 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20040217442.pdf [firstpage_image] =>[orig_patent_app_number] => 10484594 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7365874 [patent_doc_number] => 20040218078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Complementary metal oxide semiconductor image sensor with multi-floating diffusion region' [patent_app_type] => new [patent_app_number] => 10/746521 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4579 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20040218078.pdf [firstpage_image] =>[orig_patent_app_number] => 10746521 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7451924 [patent_doc_number] => 20040099957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Integrated circuit devices including low dielectric side wall spacers and methods of forming same' [patent_app_type] => new [patent_app_number] => 10/689981 [patent_app_country] => US [patent_app_date] => 2003-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4362 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20040099957.pdf [firstpage_image] =>[orig_patent_app_number] => 10689981 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7250113 [patent_doc_number] => 20040238896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/449491 [patent_app_country] => US [patent_app_date] => 2003-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4271 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20040238896.pdf [firstpage_image] =>[orig_patent_app_number] => 10449491 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6805092 [patent_doc_number] => 20030232486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-18 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/445821 [patent_app_country] => US [patent_app_date] => 2003-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6389 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20030232486.pdf [firstpage_image] =>[orig_patent_app_number] => 10445821 [rel_patent_id] =>[rel_patent_doc_number] =>)