Search

Moin M. Rahman

Examiner (ID: 10249, Phone: (571)272-5002 , Office: P/2898 )

Most Active Art Unit
2898
Art Unit(s)
2898
Total Applications
991
Issued Applications
769
Pending Applications
125
Abandoned Applications
110

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19233508 [patent_doc_number] => 20240190700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/436950 [patent_app_country] => US [patent_app_date] => 2024-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9521 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18436950 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/436950
Semiconductor device and method of manufacturing semiconductor device Feb 7, 2024 Issued
Array ( [id] => 19364255 [patent_doc_number] => 20240266289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/431007 [patent_app_country] => US [patent_app_date] => 2024-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5862 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18431007 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/431007
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING SEMICONDUCTOR STRUCTURE Feb 1, 2024 Pending
Array ( [id] => 20471016 [patent_doc_number] => 12527062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 18/430522 [patent_app_country] => US [patent_app_date] => 2024-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 5456 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18430522 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/430522
Semiconductor device Jan 31, 2024 Issued
Array ( [id] => 19285993 [patent_doc_number] => 20240222470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => ETCHING PLATINUM-CONTAINING THIN FILM USING PROTECTIVE CAP LAYER [patent_app_type] => utility [patent_app_number] => 18/428198 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18428198 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/428198
ETCHING PLATINUM-CONTAINING THIN FILM USING PROTECTIVE CAP LAYER Jan 30, 2024 Pending
Array ( [id] => 20091074 [patent_doc_number] => 20250221010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/424876 [patent_app_country] => US [patent_app_date] => 2024-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2182 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18424876 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/424876
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Jan 28, 2024 Pending
Array ( [id] => 20139514 [patent_doc_number] => 20250246558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => SEMICONDUCTOR-ON-INSULATOR (SOI) STRUCTURE WITH VARIABLE RESISTIVITY EPITAXIAL SEMICONDUCTOR LAYERS AND METHODS OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 18/424960 [patent_app_country] => US [patent_app_date] => 2024-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18424960 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/424960
SEMICONDUCTOR-ON-INSULATOR (SOI) STRUCTURE WITH VARIABLE RESISTIVITY EPITAXIAL SEMICONDUCTOR LAYERS AND METHODS OF MAKING THE SAME Jan 28, 2024 Pending
Array ( [id] => 19866389 [patent_doc_number] => 20250105175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => SEMICONDUCTOR CHIP INCLUDING CHIP GUARD STRUCTURE AND UPPER GUARD LINE DISPOSED SPACED APART FROM EACH OTHER [patent_app_type] => utility [patent_app_number] => 18/424871 [patent_app_country] => US [patent_app_date] => 2024-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18424871 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/424871
SEMICONDUCTOR CHIP INCLUDING CHIP GUARD STRUCTURE AND UPPER GUARD LINE DISPOSED SPACED APART FROM EACH OTHER Jan 28, 2024 Pending
Array ( [id] => 20113230 [patent_doc_number] => 12363985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Fluorine-free interface for semiconductor device performance gain [patent_app_type] => utility [patent_app_number] => 18/409119 [patent_app_country] => US [patent_app_date] => 2024-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4778 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18409119 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/409119
Fluorine-free interface for semiconductor device performance gain Jan 9, 2024 Issued
Array ( [id] => 20719863 [patent_doc_number] => 12635133 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Anti-dishing structure for embedded memory [patent_app_type] => utility [patent_app_number] => 18/406592 [patent_app_country] => US [patent_app_date] => 2024-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 42 [patent_no_of_words] => 8567 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406592 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/406592
Anti-dishing structure for embedded memory Jan 7, 2024 Issued
Array ( [id] => 19575621 [patent_doc_number] => 20240379913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/406150 [patent_app_country] => US [patent_app_date] => 2024-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9017 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406150 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/406150
DISPLAY DEVICE Jan 5, 2024 Pending
Array ( [id] => 19875142 [patent_doc_number] => 12268028 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Method of fabricating semiconductor device [patent_app_type] => utility [patent_app_number] => 18/395616 [patent_app_country] => US [patent_app_date] => 2023-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5708 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395616 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395616
Method of fabricating semiconductor device Dec 23, 2023 Issued
Array ( [id] => 19688300 [patent_doc_number] => 20250006845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING THE SAME, AND ARRAY SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/395410 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3884 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395410 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395410
THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING THE SAME, AND ARRAY SUBSTRATE Dec 21, 2023 Pending
Array ( [id] => 19589707 [patent_doc_number] => 20240387264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => ADVANCED COPPER INTERCONNECTS WITH HYBRID MICROSTRUCTURE [patent_app_type] => utility [patent_app_number] => 18/543532 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3055 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18543532 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/543532
ADVANCED COPPER INTERCONNECTS WITH HYBRID MICROSTRUCTURE Dec 17, 2023 Pending
Array ( [id] => 20055977 [patent_doc_number] => 20250194199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => PITCH CONFIGURATION FOR BACK-END-OF-LINE WIRING [patent_app_type] => utility [patent_app_number] => 18/536918 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536918 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/536918
PITCH CONFIGURATION FOR BACK-END-OF-LINE WIRING Dec 11, 2023 Pending
Array ( [id] => 20053707 [patent_doc_number] => 20250191929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => LAYER BY LAYER ETCH PROCESS [patent_app_type] => utility [patent_app_number] => 18/531276 [patent_app_country] => US [patent_app_date] => 2023-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531276 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531276
LAYER BY LAYER ETCH PROCESS Dec 5, 2023 Pending
Array ( [id] => 19223706 [patent_doc_number] => 20240188410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/522409 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12926 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522409 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/522409
DISPLAY DEVICE Nov 28, 2023 Pending
Array ( [id] => 19806149 [patent_doc_number] => 20250072074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => SUPERLATTICE COMPOSITE STRUCTURE AND SEMICONDUCTOR LAMINATE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/522150 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7427 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522150 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/522150
SUPERLATTICE COMPOSITE STRUCTURE AND SEMICONDUCTOR LAMINATE STRUCTURE Nov 27, 2023 Pending
Array ( [id] => 19648452 [patent_doc_number] => 20240422972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/514991 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11281 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514991 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/514991
SEMICONDUCTOR MEMORY DEVICE Nov 19, 2023 Pending
Array ( [id] => 19237373 [patent_doc_number] => 20240194568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => SUBSTRATE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/514715 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514715 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/514715
SUBSTRATE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME Nov 19, 2023 Pending
Array ( [id] => 19040392 [patent_doc_number] => 20240090207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREFOR, AND MEMORY [patent_app_type] => utility [patent_app_number] => 18/511914 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511914 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/511914
SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREFOR, AND MEMORY Nov 15, 2023 Pending
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