
Moin M. Rahman
Examiner (ID: 18220, Phone: (571)272-5002 , Office: P/2898 )
| Most Active Art Unit | 2898 |
| Art Unit(s) | 2898 |
| Total Applications | 950 |
| Issued Applications | 734 |
| Pending Applications | 154 |
| Abandoned Applications | 105 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20177604
[patent_doc_number] => 12396370
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-19
[patent_title] => MRAM structure with high TMR and high PMA
[patent_app_type] => utility
[patent_app_number] => 17/874422
[patent_app_country] => US
[patent_app_date] => 2022-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 23
[patent_no_of_words] => 4346
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874422
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/874422 | MRAM structure with high TMR and high PMA | Jul 26, 2022 | Issued |
Array
(
[id] => 20177604
[patent_doc_number] => 12396370
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-19
[patent_title] => MRAM structure with high TMR and high PMA
[patent_app_type] => utility
[patent_app_number] => 17/874422
[patent_app_country] => US
[patent_app_date] => 2022-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 23
[patent_no_of_words] => 4346
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874422
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/874422 | MRAM structure with high TMR and high PMA | Jul 26, 2022 | Issued |
Array
(
[id] => 17993360
[patent_doc_number] => 20220359397
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-10
[patent_title] => SEMICONDUCTOR DEVICES WITH BACKSIDE POWER RAIL AND METHODS OF FABRICATION THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/875075
[patent_app_country] => US
[patent_app_date] => 2022-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13945
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875075
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/875075 | Semiconductor devices with backside power rail and methods of fabrication thereof | Jul 26, 2022 | Issued |
Array
(
[id] => 17993537
[patent_doc_number] => 20220359574
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-10
[patent_title] => DISPLAY MODULE INCLUDING GLASS SUBSTRATE HAVING SIDE WIRINGS, AND DISPLAY MODULE MANUFACTURING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/873969
[patent_app_country] => US
[patent_app_date] => 2022-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8017
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873969
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/873969 | Display module including glass substrate having side wirings, and display module manufacturing method | Jul 25, 2022 | Issued |
Array
(
[id] => 18008908
[patent_doc_number] => 20220367675
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => METHODS FOR MAKING BIPOLAR JUNCTION TRANSISTORS INCLUDING EMITTER-BASE AND BASE-COLLECTOR SUPERLATTICES
[patent_app_type] => utility
[patent_app_number] => 17/873411
[patent_app_country] => US
[patent_app_date] => 2022-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5623
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873411
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/873411 | Methods for making bipolar junction transistors including emitter-base and base-collector superlattices | Jul 25, 2022 | Issued |
Array
(
[id] => 18024364
[patent_doc_number] => 20220375863
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-24
[patent_title] => SEMICONDUCTOR ARRANGEMENT AND METHOD FOR MAKING
[patent_app_type] => utility
[patent_app_number] => 17/873211
[patent_app_country] => US
[patent_app_date] => 2022-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10601
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873211
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/873211 | SEMICONDUCTOR ARRANGEMENT AND METHOD FOR MAKING | Jul 25, 2022 | Pending |
Array
(
[id] => 19733929
[patent_doc_number] => 12211931
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-28
[patent_title] => Fin field-effect transistor device with low-dimensional material and method
[patent_app_type] => utility
[patent_app_number] => 17/814620
[patent_app_country] => US
[patent_app_date] => 2022-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 62
[patent_no_of_words] => 6992
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814620
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/814620 | Fin field-effect transistor device with low-dimensional material and method | Jul 24, 2022 | Issued |
Array
(
[id] => 17993730
[patent_doc_number] => 20220359767
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-10
[patent_title] => APPARATUSES INCLUDING MULTIPLE CHANNEL MATERIALS WITHIN A TIER STACK
[patent_app_type] => utility
[patent_app_number] => 17/814164
[patent_app_country] => US
[patent_app_date] => 2022-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11940
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814164
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/814164 | Apparatuses including multiple channel materials within a tier stack | Jul 20, 2022 | Issued |
Array
(
[id] => 18891208
[patent_doc_number] => 11869987
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-09
[patent_title] => Gate-all-around integrated circuit structures including varactors
[patent_app_type] => utility
[patent_app_number] => 17/860056
[patent_app_country] => US
[patent_app_date] => 2022-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 31
[patent_no_of_words] => 16039
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17860056
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/860056 | Gate-all-around integrated circuit structures including varactors | Jul 6, 2022 | Issued |
Array
(
[id] => 17949612
[patent_doc_number] => 20220336631
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-20
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/857719
[patent_app_country] => US
[patent_app_date] => 2022-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4954
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857719
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/857719 | Semiconductor device | Jul 4, 2022 | Issued |
Array
(
[id] => 17949570
[patent_doc_number] => 20220336589
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-20
[patent_title] => CONTACT STRUCTURES FOR N-TYPE DIAMOND
[patent_app_type] => utility
[patent_app_number] => 17/810379
[patent_app_country] => US
[patent_app_date] => 2022-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8806
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17810379
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/810379 | CONTACT STRUCTURES FOR N-TYPE DIAMOND | Jun 30, 2022 | Abandoned |
Array
(
[id] => 17949436
[patent_doc_number] => 20220336455
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-20
[patent_title] => TRANSISTORS WITH VARYING WIDTH NANOSHEET
[patent_app_type] => utility
[patent_app_number] => 17/810341
[patent_app_country] => US
[patent_app_date] => 2022-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6371
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17810341
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/810341 | TRANSISTORS WITH VARYING WIDTH NANOSHEET | Jun 29, 2022 | Pending |
Array
(
[id] => 17949436
[patent_doc_number] => 20220336455
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-20
[patent_title] => TRANSISTORS WITH VARYING WIDTH NANOSHEET
[patent_app_type] => utility
[patent_app_number] => 17/810341
[patent_app_country] => US
[patent_app_date] => 2022-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6371
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17810341
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/810341 | TRANSISTORS WITH VARYING WIDTH NANOSHEET | Jun 29, 2022 | Pending |
Array
(
[id] => 17933514
[patent_doc_number] => 20220328640
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => SOURCE/DRAINS IN SEMICONDUCTOR DEVICES AND METHODS OF FORMING THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/854328
[patent_app_country] => US
[patent_app_date] => 2022-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7762
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854328
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/854328 | Source/drains in semiconductor devices and methods of forming thereof | Jun 29, 2022 | Issued |
Array
(
[id] => 19705141
[patent_doc_number] => 12199189
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-14
[patent_title] => Semiconductor device structure
[patent_app_type] => utility
[patent_app_number] => 17/853371
[patent_app_country] => US
[patent_app_date] => 2022-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 119
[patent_no_of_words] => 10710
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853371
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/853371 | Semiconductor device structure | Jun 28, 2022 | Issued |
Array
(
[id] => 18866103
[patent_doc_number] => 20230420540
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => METAL LAYER PROTECTION DURING WET ETCHING
[patent_app_type] => utility
[patent_app_number] => 17/809025
[patent_app_country] => US
[patent_app_date] => 2022-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7170
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809025
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/809025 | Metal layer protection during wet etching | Jun 26, 2022 | Issued |
Array
(
[id] => 19873815
[patent_doc_number] => 12266686
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-01
[patent_title] => Leakage reduction in gate-all-around devices
[patent_app_type] => utility
[patent_app_number] => 17/850356
[patent_app_country] => US
[patent_app_date] => 2022-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 34
[patent_no_of_words] => 13726
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850356
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/850356 | Leakage reduction in gate-all-around devices | Jun 26, 2022 | Issued |
Array
(
[id] => 18865933
[patent_doc_number] => 20230420370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => THREE-DIMENSIONAL MEMORY DEVICE INCLUDING CAPPED MOLYBDENUM WORD LINES AND METHOD OF MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/808333
[patent_app_country] => US
[patent_app_date] => 2022-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14718
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17808333
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/808333 | THREE-DIMENSIONAL MEMORY DEVICE INCLUDING CAPPED MOLYBDENUM WORD LINES AND METHOD OF MAKING THE SAME | Jun 22, 2022 | Pending |
Array
(
[id] => 18849129
[patent_doc_number] => 20230411533
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-21
[patent_title] => MULTI-STATE FIELD EFFECT TRANSISTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/806952
[patent_app_country] => US
[patent_app_date] => 2022-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4124
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806952
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/806952 | MULTI-STATE FIELD EFFECT TRANSISTOR DEVICE | Jun 14, 2022 | Pending |
Array
(
[id] => 18068299
[patent_doc_number] => 20220399387
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-15
[patent_title] => IMAGE SENSOR INCLUDING COLOR SEPARATION LENS ARRAY AND ELECTRONIC APPARATUS INCLUDING THE IMAGE SENSOR
[patent_app_type] => utility
[patent_app_number] => 17/840916
[patent_app_country] => US
[patent_app_date] => 2022-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14782
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840916
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/840916 | IMAGE SENSOR INCLUDING COLOR SEPARATION LENS ARRAY AND ELECTRONIC APPARATUS INCLUDING THE IMAGE SENSOR | Jun 14, 2022 | Pending |