Search

Molly Kay Reida

Examiner (ID: 10064, Phone: (571)272-4237 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2816, 2898, 2899
Total Applications
638
Issued Applications
499
Pending Applications
84
Abandoned Applications
73

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19517839 [patent_doc_number] => 20240349525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => IMAGING DEVICE [patent_app_type] => utility [patent_app_number] => 18/753873 [patent_app_country] => US [patent_app_date] => 2024-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18753873 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/753873
Imaging device Jun 24, 2024 Issued
Array ( [id] => 19366090 [patent_doc_number] => 20240268124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/636306 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5073 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18636306 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/636306
Semiconductor structure and method for forming the same Apr 15, 2024 Issued
Array ( [id] => 19323293 [patent_doc_number] => 20240244841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/618675 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618675 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/618675
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE Mar 26, 2024 Pending
Array ( [id] => 20189730 [patent_doc_number] => 12400853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Method of forming conductive feature including cleaning step [patent_app_type] => utility [patent_app_number] => 18/598322 [patent_app_country] => US [patent_app_date] => 2024-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 26 [patent_no_of_words] => 3465 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18598322 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/598322
Method of forming conductive feature including cleaning step Mar 6, 2024 Issued
Array ( [id] => 19852840 [patent_doc_number] => 20250098191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/598456 [patent_app_country] => US [patent_app_date] => 2024-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18598456 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/598456
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Mar 6, 2024 Pending
Array ( [id] => 20030987 [patent_doc_number] => 20250169209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 18/598464 [patent_app_country] => US [patent_app_date] => 2024-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1198 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18598464 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/598464
IMAGE SENSOR Mar 6, 2024 Pending
Array ( [id] => 19366085 [patent_doc_number] => 20240268119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => METHOD FOR FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR DEVICE USING BURIED STOP LAYER IN SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/594317 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7845 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594317 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/594317
METHOD FOR FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR DEVICE USING BURIED STOP LAYER IN SUBSTRATE Mar 3, 2024 Pending
Array ( [id] => 19468328 [patent_doc_number] => 20240321998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/444778 [patent_app_country] => US [patent_app_date] => 2024-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3794 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18444778 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/444778
SEMICONDUCTOR STRUCTURE Feb 18, 2024 Pending
Array ( [id] => 19712610 [patent_doc_number] => 20250022752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => FLAT METAL FEATURES FOR MICROELECTRONICS APPLICATIONS [patent_app_type] => utility [patent_app_number] => 18/444460 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7714 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18444460 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/444460
FLAT METAL FEATURES FOR MICROELECTRONICS APPLICATIONS Feb 15, 2024 Pending
Array ( [id] => 19321675 [patent_doc_number] => 20240243222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => SEMICONDUCTOR LIGHT-EMITTING DEVICE AND OPTICAL COUPLING DEVICE [patent_app_type] => utility [patent_app_number] => 18/423939 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4614 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18423939 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/423939
SEMICONDUCTOR LIGHT-EMITTING DEVICE AND OPTICAL COUPLING DEVICE Jan 25, 2024 Pending
Array ( [id] => 19349397 [patent_doc_number] => 20240258361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => QUANTUM DOT HYBRID INTEGRATED MULTI-COLOR DISPLAY AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/423645 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18423645 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/423645
QUANTUM DOT HYBRID INTEGRATED MULTI-COLOR DISPLAY AND MANUFACTURING METHOD THEREFOR Jan 25, 2024 Pending
Array ( [id] => 19178111 [patent_doc_number] => 20240164085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => CAPACITOR AND A DRAM DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/416313 [patent_app_country] => US [patent_app_date] => 2024-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18416313 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/416313
Capacitor and a dram device including the same Jan 17, 2024 Issued
Array ( [id] => 20103098 [patent_doc_number] => 20250233034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => SEMICONDUCTOR STRUCTURE WITH CAPPING LAYER AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/415487 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7285 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18415487 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/415487
SEMICONDUCTOR STRUCTURE WITH CAPPING LAYER AND MANUFACTURING METHOD THEREOF Jan 16, 2024 Pending
Array ( [id] => 20104617 [patent_doc_number] => 20250234553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => METHOD OF SELECTIVE BOTTOM WIDENING OF HIGH ASPECT RATIO OPENINGS THROUGH A MULTI-LAYER STACK [patent_app_type] => utility [patent_app_number] => 18/415100 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16962 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18415100 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/415100
METHOD OF SELECTIVE BOTTOM WIDENING OF HIGH ASPECT RATIO OPENINGS THROUGH A MULTI-LAYER STACK Jan 16, 2024 Pending
Array ( [id] => 19454953 [patent_doc_number] => 20240315083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/414105 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21663 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414105 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/414105
DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME Jan 15, 2024 Pending
Array ( [id] => 19688096 [patent_doc_number] => 20250006641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/405023 [patent_app_country] => US [patent_app_date] => 2024-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7673 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18405023 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/405023
SEMICONDUCTOR DEVICE Jan 4, 2024 Pending
Array ( [id] => 20096357 [patent_doc_number] => 20250226293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => Embedded Power Semiconductor Package with Sidewall Contacts [patent_app_type] => utility [patent_app_number] => 18/403854 [patent_app_country] => US [patent_app_date] => 2024-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18403854 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/403854
Embedded Power Semiconductor Package with Sidewall Contacts Jan 3, 2024 Pending
Array ( [id] => 20088963 [patent_doc_number] => 20250218899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/399748 [patent_app_country] => US [patent_app_date] => 2023-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399748 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399748
INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF Dec 28, 2023 Pending
Array ( [id] => 19797922 [patent_doc_number] => 12238921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Semiconductor memory device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 18/541566 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8354 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18541566 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/541566
Semiconductor memory device and method for fabricating the same Dec 14, 2023 Issued
Array ( [id] => 19285997 [patent_doc_number] => 20240222474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => EXCHANGE ELECTRODES FOR NETWORK OF QUANTUM DOTS [patent_app_type] => utility [patent_app_number] => 18/538055 [patent_app_country] => US [patent_app_date] => 2023-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18538055 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/538055
EXCHANGE ELECTRODES FOR NETWORK OF QUANTUM DOTS Dec 12, 2023 Pending
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