Search

Molly Kay Reida

Examiner (ID: 11747, Phone: (571)272-4237 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2816, 2898, 2899
Total Applications
613
Issued Applications
484
Pending Applications
84
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13571331 [patent_doc_number] => 20180337213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => LIGHT-EMITTING DIODE CHIP [patent_app_type] => utility [patent_app_number] => 16/046990 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4547 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16046990 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/046990
Light-emitting diode chip Jul 25, 2018 Issued
Array ( [id] => 13559013 [patent_doc_number] => 20180331054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => FAN-OUT SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/042644 [patent_app_country] => US [patent_app_date] => 2018-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11083 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16042644 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/042644
Fan-out semiconductor package Jul 22, 2018 Issued
Array ( [id] => 13543329 [patent_doc_number] => 20180323211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/031588 [patent_app_country] => US [patent_app_date] => 2018-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10057 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16031588 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/031588
Semiconductor memory device and manufacturing method thereof Jul 9, 2018 Issued
Array ( [id] => 13485487 [patent_doc_number] => 20180294286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/004546 [patent_app_country] => US [patent_app_date] => 2018-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16004546 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/004546
Display device Jun 10, 2018 Issued
Array ( [id] => 14938289 [patent_doc_number] => 20190304783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => TECHNIQUES FOR FORMING LOW STRESS ETCH-RESISTANT MASK USING IMPLANTATION [patent_app_type] => utility [patent_app_number] => 15/997251 [patent_app_country] => US [patent_app_date] => 2018-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5367 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15997251 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/997251
Techniques for forming low stress etch-resistant mask using implantation Jun 3, 2018 Issued
Array ( [id] => 14350263 [patent_doc_number] => 20190157104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => METHOD OF FORMING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR APPARATUS [patent_app_type] => utility [patent_app_number] => 15/996254 [patent_app_country] => US [patent_app_date] => 2018-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6393 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15996254 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/996254
Laser anneal process May 31, 2018 Issued
Array ( [id] => 14397745 [patent_doc_number] => 10312163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-04 [patent_title] => Method of improving surface smoothness of dummy gate [patent_app_type] => utility [patent_app_number] => 15/995283 [patent_app_country] => US [patent_app_date] => 2018-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4124 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15995283 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/995283
Method of improving surface smoothness of dummy gate May 31, 2018 Issued
Array ( [id] => 14671809 [patent_doc_number] => 10373823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Deployment of light energy within specific spectral bands in specific sequences for deposition, treatment and removal of materials [patent_app_type] => utility [patent_app_number] => 15/994409 [patent_app_country] => US [patent_app_date] => 2018-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8201 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15994409 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/994409
Deployment of light energy within specific spectral bands in specific sequences for deposition, treatment and removal of materials May 30, 2018 Issued
Array ( [id] => 14617143 [patent_doc_number] => 10361279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-23 [patent_title] => Method for manufacturing FinFET structure with doped region [patent_app_type] => utility [patent_app_number] => 15/994691 [patent_app_country] => US [patent_app_date] => 2018-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 6394 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15994691 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/994691
Method for manufacturing FinFET structure with doped region May 30, 2018 Issued
Array ( [id] => 14985041 [patent_doc_number] => 10446441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Flat metal features for microelectronics applications [patent_app_type] => utility [patent_app_number] => 15/994435 [patent_app_country] => US [patent_app_date] => 2018-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7655 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15994435 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/994435
Flat metal features for microelectronics applications May 30, 2018 Issued
Array ( [id] => 15389097 [patent_doc_number] => 10535751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-14 [patent_title] => Selective silicon growth for gapfill improvement [patent_app_type] => utility [patent_app_number] => 15/992357 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 8852 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992357 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992357
Selective silicon growth for gapfill improvement May 29, 2018 Issued
Array ( [id] => 15015213 [patent_doc_number] => 10453765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Wafer-level packaging for enhanced performance [patent_app_type] => utility [patent_app_number] => 15/992639 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5256 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992639 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992639
Wafer-level packaging for enhanced performance May 29, 2018 Issued
Array ( [id] => 16308888 [patent_doc_number] => 10777699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-15 [patent_title] => Photodetection element including photoelectric conversion structure and avalanche structure [patent_app_type] => utility [patent_app_number] => 15/993552 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 15772 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15993552 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/993552
Photodetection element including photoelectric conversion structure and avalanche structure May 29, 2018 Issued
Array ( [id] => 15015213 [patent_doc_number] => 10453765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Wafer-level packaging for enhanced performance [patent_app_type] => utility [patent_app_number] => 15/992639 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5256 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992639 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992639
Wafer-level packaging for enhanced performance May 29, 2018 Issued
Array ( [id] => 15015213 [patent_doc_number] => 10453765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Wafer-level packaging for enhanced performance [patent_app_type] => utility [patent_app_number] => 15/992639 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5256 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992639 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992639
Wafer-level packaging for enhanced performance May 29, 2018 Issued
Array ( [id] => 15015213 [patent_doc_number] => 10453765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Wafer-level packaging for enhanced performance [patent_app_type] => utility [patent_app_number] => 15/992639 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5256 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992639 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992639
Wafer-level packaging for enhanced performance May 29, 2018 Issued
Array ( [id] => 15015213 [patent_doc_number] => 10453765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Wafer-level packaging for enhanced performance [patent_app_type] => utility [patent_app_number] => 15/992639 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5256 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992639 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992639
Wafer-level packaging for enhanced performance May 29, 2018 Issued
Array ( [id] => 15015213 [patent_doc_number] => 10453765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Wafer-level packaging for enhanced performance [patent_app_type] => utility [patent_app_number] => 15/992639 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5256 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992639 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992639
Wafer-level packaging for enhanced performance May 29, 2018 Issued
Array ( [id] => 15015213 [patent_doc_number] => 10453765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Wafer-level packaging for enhanced performance [patent_app_type] => utility [patent_app_number] => 15/992639 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5256 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992639 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992639
Wafer-level packaging for enhanced performance May 29, 2018 Issued
Array ( [id] => 15015213 [patent_doc_number] => 10453765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Wafer-level packaging for enhanced performance [patent_app_type] => utility [patent_app_number] => 15/992639 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5256 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15992639 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/992639
Wafer-level packaging for enhanced performance May 29, 2018 Issued
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