Search

Molly Kay Reida

Examiner (ID: 11747, Phone: (571)272-4237 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2816, 2898, 2899
Total Applications
613
Issued Applications
484
Pending Applications
84
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14285249 [patent_doc_number] => 20190139909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => Physical Unclonable Functions in Integrated Circuit Chip Packaging for Security [patent_app_type] => utility [patent_app_number] => 15/808573 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3391 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15808573 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/808573
Physical Unclonable Functions in Integrated Circuit Chip Packaging for Security Nov 8, 2017 Abandoned
Array ( [id] => 12716626 [patent_doc_number] => 20180130708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => METHOD FOR FULLY SELF-ALIGNED VIA FORMATION USING A DIRECTED SELF ASSEMBLY (DSA) PROCESS [patent_app_type] => utility [patent_app_number] => 15/808473 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3756 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15808473 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/808473
Method for fully self-aligned via formation using a directed self assembly (DSA) process Nov 8, 2017 Issued
Array ( [id] => 13293195 [patent_doc_number] => 10157798 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-12-18 [patent_title] => Uniform bottom spacers in vertical field effect transistors [patent_app_type] => utility [patent_app_number] => 15/808467 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9107 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15808467 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/808467
Uniform bottom spacers in vertical field effect transistors Nov 8, 2017 Issued
Array ( [id] => 14285623 [patent_doc_number] => 20190140096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => TRANSISTOR DEVICE AND SEMICONDUCTOR LAYOUT STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/808395 [patent_app_country] => US [patent_app_date] => 2017-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7765 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15808395 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/808395
Transistor device and semiconductor layout structure Nov 8, 2017 Issued
Array ( [id] => 16774134 [patent_doc_number] => 10985258 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Method for preparing diamond-based field effect transistor, and corresponding field effect transistor [patent_app_type] => utility [patent_app_number] => 16/644233 [patent_app_country] => US [patent_app_date] => 2017-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4949 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16644233 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/644233
Method for preparing diamond-based field effect transistor, and corresponding field effect transistor Nov 5, 2017 Issued
Array ( [id] => 14753411 [patent_doc_number] => 20190259879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => LOW-TEMPERATURE POLYSILICON THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME, AND DISPLAY SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/781327 [patent_app_country] => US [patent_app_date] => 2017-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7265 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15781327 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/781327
Low-temperature polysilicon thin film transistor, method of manufacturing the same, and display substrate Oct 26, 2017 Issued
Array ( [id] => 13229125 [patent_doc_number] => 10128345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/792772 [patent_app_country] => US [patent_app_date] => 2017-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8910 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15792772 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/792772
Semiconductor device Oct 24, 2017 Issued
Array ( [id] => 13085311 [patent_doc_number] => 10062729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Light-emitting diode chip [patent_app_type] => utility [patent_app_number] => 15/792743 [patent_app_country] => US [patent_app_date] => 2017-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4919 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15792743 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/792743
Light-emitting diode chip Oct 23, 2017 Issued
Array ( [id] => 12181591 [patent_doc_number] => 20180040527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-08 [patent_title] => 'SILICON PACKAGE HAVING ELECTRICAL FUNCTIONALITY BY EMBEDDED PASSIVE COMPONENTS' [patent_app_type] => utility [patent_app_number] => 15/785778 [patent_app_country] => US [patent_app_date] => 2017-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3663 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15785778 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/785778
Silicon package having electrical functionality by embedded passive components Oct 16, 2017 Issued
Array ( [id] => 13019701 [patent_doc_number] => 10032970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Side surface type optical semiconductor device [patent_app_type] => utility [patent_app_number] => 15/784243 [patent_app_country] => US [patent_app_date] => 2017-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4245 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15784243 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/784243
Side surface type optical semiconductor device Oct 15, 2017 Issued
Array ( [id] => 13243233 [patent_doc_number] => 10134828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Display device and method of manufacturing a display device [patent_app_type] => utility [patent_app_number] => 15/784270 [patent_app_country] => US [patent_app_date] => 2017-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4503 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15784270 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/784270
Display device and method of manufacturing a display device Oct 15, 2017 Issued
Array ( [id] => 13293677 [patent_doc_number] => 10158039 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-12-18 [patent_title] => Heterojunction diode having a narrow bandgap semiconductor [patent_app_type] => utility [patent_app_number] => 15/784384 [patent_app_country] => US [patent_app_date] => 2017-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3524 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15784384 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/784384
Heterojunction diode having a narrow bandgap semiconductor Oct 15, 2017 Issued
Array ( [id] => 13098863 [patent_doc_number] => 10068776 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-09-04 [patent_title] => Raster-planarized substrate interlayers and methods of planarizing same [patent_app_type] => utility [patent_app_number] => 15/637969 [patent_app_country] => US [patent_app_date] => 2017-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 8511 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15637969 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/637969
Raster-planarized substrate interlayers and methods of planarizing same Jun 28, 2017 Issued
Array ( [id] => 12631350 [patent_doc_number] => 20180102280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-12 [patent_title] => Methods for Fabricating Semiconductor Devices Including Surface Treatment Processes [patent_app_type] => utility [patent_app_number] => 15/636889 [patent_app_country] => US [patent_app_date] => 2017-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9821 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15636889 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/636889
Methods for fabricating semiconductor devices including surface treatment processes Jun 28, 2017 Issued
Array ( [id] => 12897202 [patent_doc_number] => 20180190909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-05 [patent_title] => METHOD AND DEVICE FOR EVALUATING QUALITY OF THIN FILM LAYER [patent_app_type] => utility [patent_app_number] => 15/635990 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9002 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15635990 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/635990
Method and device for evaluating quality of thin film layer Jun 27, 2017 Issued
Array ( [id] => 12208543 [patent_doc_number] => 20180053769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/634066 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6837 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634066 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634066
Semiconductor device and method for fabricating the same Jun 26, 2017 Issued
Array ( [id] => 13019209 [patent_doc_number] => 10032724 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Silicon carbide semiconductor base, method of crystal axis alignment in silicon carbide semiconductor base, and method of manufacturing silicon carbide semiconductor device [patent_app_type] => utility [patent_app_number] => 15/634656 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 5405 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634656 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634656
Silicon carbide semiconductor base, method of crystal axis alignment in silicon carbide semiconductor base, and method of manufacturing silicon carbide semiconductor device Jun 26, 2017 Issued
Array ( [id] => 11997440 [patent_doc_number] => 20170301595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-19 [patent_title] => 'SILICON PACKAGE FOR EMBEDDED SEMICONDUCTOR CHIP AND POWER CONVERTER' [patent_app_type] => utility [patent_app_number] => 15/634232 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6211 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634232 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634232
Silicon package for embedded semiconductor chip and power converter Jun 26, 2017 Issued
Array ( [id] => 11997441 [patent_doc_number] => 20170301596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-19 [patent_title] => 'SILICON PACKAGE FOR EMBEDDED SEMICONDUCTOR CHIP AND POWER CONVERTER' [patent_app_type] => utility [patent_app_number] => 15/634472 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6211 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634472 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634472
Silicon package for embedded semiconductor chip and power converter Jun 26, 2017 Issued
Array ( [id] => 13723995 [patent_doc_number] => 20170372953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-28 [patent_title] => CVD BASED OXIDE-METAL MULTI STRUCTURE FOR 3D NAND MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 15/633366 [patent_app_country] => US [patent_app_date] => 2017-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5603 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15633366 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/633366
CVD based oxide-metal multi structure for 3D NAND memory devices Jun 25, 2017 Issued
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