Search

Molly Kay Reida

Examiner (ID: 11747, Phone: (571)272-4237 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2816, 2898, 2899
Total Applications
613
Issued Applications
484
Pending Applications
84
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10624602 [patent_doc_number] => 09343552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'FinFET with embedded MOS varactor and method of making same' [patent_app_type] => utility [patent_app_number] => 14/719090 [patent_app_country] => US [patent_app_date] => 2015-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 4110 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14719090 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/719090
FinFET with embedded MOS varactor and method of making same May 20, 2015 Issued
Array ( [id] => 12040427 [patent_doc_number] => 09818662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-14 [patent_title] => 'Silicon package having electrical functionality by embedded passive components' [patent_app_type] => utility [patent_app_number] => 14/702031 [patent_app_country] => US [patent_app_date] => 2015-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3632 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14702031 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/702031
Silicon package having electrical functionality by embedded passive components Apr 30, 2015 Issued
Array ( [id] => 10309494 [patent_doc_number] => 20150194495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-09 [patent_title] => 'MOSFET TERMINATION TRENCH' [patent_app_type] => utility [patent_app_number] => 14/663872 [patent_app_country] => US [patent_app_date] => 2015-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9534 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14663872 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/663872
MOSFET termination trench Mar 19, 2015 Issued
Array ( [id] => 10302564 [patent_doc_number] => 20150187564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'METHOD OF USING A VAPORIZING SPRAY SYSTEM TO PERFORM A TRIMMING PROCESS' [patent_app_type] => utility [patent_app_number] => 14/657954 [patent_app_country] => US [patent_app_date] => 2015-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4844 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14657954 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/657954
Method of using a vaporizing spray system to perform a trimming process Mar 12, 2015 Issued
Array ( [id] => 10294734 [patent_doc_number] => 20150179733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'SCHOTTKY DIODE WITH BURIED LAYER IN GAN MATERIALS' [patent_app_type] => utility [patent_app_number] => 14/594778 [patent_app_country] => US [patent_app_date] => 2015-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 8226 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14594778 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/594778
Schottky diode with buried layer in GaN materials Jan 11, 2015 Issued
Array ( [id] => 10252380 [patent_doc_number] => 20150137376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'Semiconductor Structure and Semiconductor Fabricating Process for the Same' [patent_app_type] => utility [patent_app_number] => 14/559660 [patent_app_country] => US [patent_app_date] => 2014-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6922 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14559660 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/559660
Semiconductor structure and semiconductor fabricating process for the same Dec 2, 2014 Issued
Array ( [id] => 9928320 [patent_doc_number] => 20150076512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'SEMICONDUCTOR SUBSTRATE AND METHOD OF FORMING' [patent_app_type] => utility [patent_app_number] => 14/550396 [patent_app_country] => US [patent_app_date] => 2014-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9937 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14550396 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/550396
Semiconductor substrate and method of forming Nov 20, 2014 Issued
Array ( [id] => 11432330 [patent_doc_number] => 09570657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'LED that has bounding silicon-doped regions on either side of a strain release layer' [patent_app_type] => utility [patent_app_number] => 14/540864 [patent_app_country] => US [patent_app_date] => 2014-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3325 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14540864 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/540864
LED that has bounding silicon-doped regions on either side of a strain release layer Nov 12, 2014 Issued
Array ( [id] => 11817902 [patent_doc_number] => 09721860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-01 [patent_title] => 'Silicon package for embedded semiconductor chip and power converter' [patent_app_type] => utility [patent_app_number] => 14/534254 [patent_app_country] => US [patent_app_date] => 2014-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6173 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14534254 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/534254
Silicon package for embedded semiconductor chip and power converter Nov 5, 2014 Issued
Array ( [id] => 10787542 [patent_doc_number] => 20160133698 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/535110 [patent_app_country] => US [patent_app_date] => 2014-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6132 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14535110 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/535110
Isolation structure for semiconductor device Nov 5, 2014 Issued
Array ( [id] => 10787147 [patent_doc_number] => 20160133303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'DOPED METAL-INSULATOR-TRANSITION LATCH CIRCUITRY' [patent_app_type] => utility [patent_app_number] => 14/534205 [patent_app_country] => US [patent_app_date] => 2014-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2912 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14534205 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/534205
Doped metal-insulator-transition latch circuitry Nov 5, 2014 Issued
Array ( [id] => 10512935 [patent_doc_number] => 09240515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-19 [patent_title] => 'Method of manufacturing a solar cell' [patent_app_type] => utility [patent_app_number] => 14/534814 [patent_app_country] => US [patent_app_date] => 2014-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 6059 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14534814 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/534814
Method of manufacturing a solar cell Nov 5, 2014 Issued
Array ( [id] => 10787324 [patent_doc_number] => 20160133480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'METHODS FOR FORMING A SELF-ALIGNED CONTACT VIA SELECTIVE LATERAL ETCH' [patent_app_type] => utility [patent_app_number] => 14/535055 [patent_app_country] => US [patent_app_date] => 2014-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4619 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14535055 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/535055
Methods for forming a self-aligned contact via selective lateral etch Nov 5, 2014 Issued
Array ( [id] => 11725301 [patent_doc_number] => 09698167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-04 [patent_title] => 'Film transistor array panel and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/534508 [patent_app_country] => US [patent_app_date] => 2014-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5414 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14534508 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/534508
Film transistor array panel and manufacturing method thereof Nov 5, 2014 Issued
Array ( [id] => 11521456 [patent_doc_number] => 09604841 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'MEMS sensor cap with multiple isolated electrodes' [patent_app_type] => utility [patent_app_number] => 14/534663 [patent_app_country] => US [patent_app_date] => 2014-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 3289 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14534663 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/534663
MEMS sensor cap with multiple isolated electrodes Nov 5, 2014 Issued
Array ( [id] => 10789137 [patent_doc_number] => 20160135293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'SUBSTRATE STRUCTURES AND METHODS OF MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 14/534482 [patent_app_country] => US [patent_app_date] => 2014-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7443 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14534482 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/534482
Substrate structures and methods of manufacture Nov 5, 2014 Issued
Array ( [id] => 10787371 [patent_doc_number] => 20160133528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'FORMING STRAINED FINS OF DIFFERENT MATERIAL ON A SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 14/534678 [patent_app_country] => US [patent_app_date] => 2014-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4444 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14534678 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/534678
Forming strained fins of different material on a substrate Nov 5, 2014 Issued
Array ( [id] => 11811521 [patent_doc_number] => 09716095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-25 [patent_title] => 'Semiconductor memory devices with multi-level contact structures' [patent_app_type] => utility [patent_app_number] => 14/534853 [patent_app_country] => US [patent_app_date] => 2014-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 138 [patent_figures_cnt] => 138 [patent_no_of_words] => 10806 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14534853 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/534853
Semiconductor memory devices with multi-level contact structures Nov 5, 2014 Issued
Array ( [id] => 10964732 [patent_doc_number] => 20140367765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/474383 [patent_app_country] => US [patent_app_date] => 2014-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7746 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14474383 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/474383
Three-dimensional semiconductor memory device Sep 1, 2014 Issued
Array ( [id] => 10936536 [patent_doc_number] => 20140339557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/451686 [patent_app_country] => US [patent_app_date] => 2014-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6816 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14451686 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/451686
Semiconductor device Aug 4, 2014 Issued
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