
Molly Kay Reida
Examiner (ID: 683, Phone: (571)272-4237 , Office: P/2816 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816, 2899, 2898 |
| Total Applications | 641 |
| Issued Applications | 501 |
| Pending Applications | 79 |
| Abandoned Applications | 76 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10964732
[patent_doc_number] => 20140367765
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-18
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/474383
[patent_app_country] => US
[patent_app_date] => 2014-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 7746
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14474383
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/474383 | Three-dimensional semiconductor memory device | Sep 1, 2014 | Issued |
Array
(
[id] => 10936536
[patent_doc_number] => 20140339557
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-20
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/451686
[patent_app_country] => US
[patent_app_date] => 2014-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6816
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14451686
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/451686 | Semiconductor device | Aug 4, 2014 | Issued |
Array
(
[id] => 12102373
[patent_doc_number] => 09859476
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-01-02
[patent_title] => 'LED production method and LEDs'
[patent_app_type] => utility
[patent_app_number] => 15/324826
[patent_app_country] => US
[patent_app_date] => 2014-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5042
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15324826
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/324826 | LED production method and LEDs | Jul 24, 2014 | Issued |
Array
(
[id] => 10929803
[patent_doc_number] => 20140332824
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-13
[patent_title] => 'SEMICONDUCTOR STRUCTURE WITH DIFFERENT FINS OF FINFETS'
[patent_app_type] => utility
[patent_app_number] => 14/340267
[patent_app_country] => US
[patent_app_date] => 2014-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1827
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14340267
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/340267 | Semiconductor structure with different fins of FinFETs | Jul 23, 2014 | Issued |
Array
(
[id] => 10929855
[patent_doc_number] => 20140332876
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-13
[patent_title] => 'HIGH VOLTAGE GATE FORMATION'
[patent_app_type] => utility
[patent_app_number] => 14/340054
[patent_app_country] => US
[patent_app_date] => 2014-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 5289
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14340054
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/340054 | HIGH VOLTAGE GATE FORMATION | Jul 23, 2014 | Abandoned |
Array
(
[id] => 10004165
[patent_doc_number] => 09048263
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-02
[patent_title] => 'Manufacturing method of non-volatile memory'
[patent_app_type] => utility
[patent_app_number] => 14/314830
[patent_app_country] => US
[patent_app_date] => 2014-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 20
[patent_no_of_words] => 5825
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14314830
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/314830 | Manufacturing method of non-volatile memory | Jun 24, 2014 | Issued |
Array
(
[id] => 10651917
[patent_doc_number] => 09368177
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-06-14
[patent_title] => 'Magnetic resistance structure, method of manufacturing the magnetic resistance structure, and electronic device including the magnetic resistance structure'
[patent_app_type] => utility
[patent_app_number] => 14/282470
[patent_app_country] => US
[patent_app_date] => 2014-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 7174
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14282470
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/282470 | Magnetic resistance structure, method of manufacturing the magnetic resistance structure, and electronic device including the magnetic resistance structure | May 19, 2014 | Issued |
Array
(
[id] => 14738791
[patent_doc_number] => 10388807
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-20
[patent_title] => Mirrors including reflective and second layers disposed on photodetectors
[patent_app_type] => utility
[patent_app_number] => 15/120510
[patent_app_country] => US
[patent_app_date] => 2014-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4658
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15120510
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/120510 | Mirrors including reflective and second layers disposed on photodetectors | Apr 29, 2014 | Issued |
Array
(
[id] => 9642626
[patent_doc_number] => 20140220737
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-07
[patent_title] => 'FLIP-CHIP HYBRIDIZATION OF MICROELECTRONIC COMPONENTS USING SUSPENDED FUSIBLE RESISTIVE CONNECTION ELEMENTS'
[patent_app_type] => utility
[patent_app_number] => 14/203628
[patent_app_country] => US
[patent_app_date] => 2014-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2603
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14203628
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/203628 | Flip-chip hybridization of microelectronic components using suspended fusible resistive connection elements | Mar 10, 2014 | Issued |
Array
(
[id] => 10681637
[patent_doc_number] => 20160027783
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-28
[patent_title] => 'PRODUCTION METHOD FOR SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/774700
[patent_app_country] => US
[patent_app_date] => 2014-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4330
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14774700
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/774700 | PRODUCTION METHOD FOR SEMICONDUCTOR DEVICE | Mar 9, 2014 | Abandoned |
Array
(
[id] => 10631751
[patent_doc_number] => 09349908
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-24
[patent_title] => 'Method for manufacturing semiconductor light-emitting element'
[patent_app_type] => utility
[patent_app_number] => 14/774579
[patent_app_country] => US
[patent_app_date] => 2014-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 16
[patent_no_of_words] => 4938
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14774579
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/774579 | Method for manufacturing semiconductor light-emitting element | Mar 4, 2014 | Issued |
Array
(
[id] => 9566016
[patent_doc_number] => 20140183729
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-07-03
[patent_title] => 'SENSOR PACKAGES HAVING SEMICONDUCTOR DIES OF DIFFERING SIZES'
[patent_app_type] => utility
[patent_app_number] => 14/197990
[patent_app_country] => US
[patent_app_date] => 2014-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 9232
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14197990
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/197990 | SENSOR PACKAGES HAVING SEMICONDUCTOR DIES OF DIFFERING SIZES | Mar 4, 2014 | Abandoned |
Array
(
[id] => 10666945
[patent_doc_number] => 20160013089
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-14
[patent_title] => 'SEMICONDUCTOR DEVICE PRODUCTION METHOD, SHEET-SHAPED RESIN COMPOSITION, DICING TAPE-INTEGRATED SHEET-SHAPED RESIN COMPOSITION'
[patent_app_type] => utility
[patent_app_number] => 14/772724
[patent_app_country] => US
[patent_app_date] => 2014-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 24259
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14772724
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/772724 | SEMICONDUCTOR DEVICE PRODUCTION METHOD, SHEET-SHAPED RESIN COMPOSITION, DICING TAPE-INTEGRATED SHEET-SHAPED RESIN COMPOSITION | Feb 27, 2014 | Abandoned |
Array
(
[id] => 9944763
[patent_doc_number] => 08994064
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-31
[patent_title] => 'Led that has bounding silicon-doped regions on either side of a strain release layer'
[patent_app_type] => utility
[patent_app_number] => 14/158440
[patent_app_country] => US
[patent_app_date] => 2014-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3298
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14158440
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/158440 | Led that has bounding silicon-doped regions on either side of a strain release layer | Jan 16, 2014 | Issued |
Array
(
[id] => 9460308
[patent_doc_number] => 20140124733
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-08
[patent_title] => 'LIGHT EMITTING DIODE, LIGHT EMITTING DIODE LAMP, AND ILLUMINATING APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 14/152832
[patent_app_country] => US
[patent_app_date] => 2014-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 52152
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14152832
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/152832 | Light emitting diode, light emitting diode lamp, and illuminating apparatus | Jan 9, 2014 | Issued |
Array
(
[id] => 9408544
[patent_doc_number] => 20140099796
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-10
[patent_title] => 'METHOD FOR DEVELOPING LOW DIELECTRIC CONSTANT FILM AND DEVICES OBTAINED THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/045678
[patent_app_country] => US
[patent_app_date] => 2013-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5527
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14045678
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/045678 | METHOD FOR DEVELOPING LOW DIELECTRIC CONSTANT FILM AND DEVICES OBTAINED THEREOF | Oct 2, 2013 | Abandoned |
Array
(
[id] => 10570364
[patent_doc_number] => 09293543
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-22
[patent_title] => 'Film forming method and film forming apparatus'
[patent_app_type] => utility
[patent_app_number] => 14/044119
[patent_app_country] => US
[patent_app_date] => 2013-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 27
[patent_no_of_words] => 12075
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14044119
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/044119 | Film forming method and film forming apparatus | Oct 1, 2013 | Issued |
Array
(
[id] => 9642671
[patent_doc_number] => 20140220782
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-07
[patent_title] => 'METHODS OF FORMING HOLE PATTERNS OF SEMICONDUCTOR DEVICES'
[patent_app_type] => utility
[patent_app_number] => 14/043361
[patent_app_country] => US
[patent_app_date] => 2013-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 35
[patent_no_of_words] => 7983
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14043361
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/043361 | Methods of forming hole patterns of semiconductor devices | Sep 30, 2013 | Issued |
Array
(
[id] => 9408531
[patent_doc_number] => 20140099783
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-10
[patent_title] => 'METHOD OF ADDING AN ADDITIONAL MASK IN THE ION-IMPLANTATION PROCESS'
[patent_app_type] => utility
[patent_app_number] => 14/043107
[patent_app_country] => US
[patent_app_date] => 2013-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1893
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14043107
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/043107 | METHOD OF ADDING AN ADDITIONAL MASK IN THE ION-IMPLANTATION PROCESS | Sep 30, 2013 | Abandoned |
Array
(
[id] => 11770251
[patent_doc_number] => 09378942
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-06-28
[patent_title] => 'Deposition method and deposition apparatus'
[patent_app_type] => utility
[patent_app_number] => 14/041004
[patent_app_country] => US
[patent_app_date] => 2013-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 23
[patent_no_of_words] => 10951
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14041004
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/041004 | Deposition method and deposition apparatus | Sep 29, 2013 | Issued |