
Molly Kay Reida
Examiner (ID: 683, Phone: (571)272-4237 , Office: P/2816 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816, 2899, 2898 |
| Total Applications | 641 |
| Issued Applications | 501 |
| Pending Applications | 79 |
| Abandoned Applications | 76 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9600744
[patent_doc_number] => 20140197426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-07-17
[patent_title] => 'LIGHT EMITTING DIODE CHIP STRUCTURE AND LIGHT EMITTING DIODE ELEMENT'
[patent_app_type] => utility
[patent_app_number] => 13/856872
[patent_app_country] => US
[patent_app_date] => 2013-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3697
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13856872
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/856872 | LIGHT EMITTING DIODE CHIP STRUCTURE AND LIGHT EMITTING DIODE ELEMENT | Apr 3, 2013 | Abandoned |
Array
(
[id] => 9728927
[patent_doc_number] => 20140264634
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-18
[patent_title] => 'FINFET FOR RF AND ANALOG INTEGRATED CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 13/826219
[patent_app_country] => US
[patent_app_date] => 2013-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6007
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13826219
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/826219 | FINFET FOR RF AND ANALOG INTEGRATED CIRCUITS | Mar 13, 2013 | Abandoned |
Array
(
[id] => 10513824
[patent_doc_number] => 09241407
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-01-19
[patent_title] => 'Tape film packages and methods of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 13/747832
[patent_app_country] => US
[patent_app_date] => 2013-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 5350
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[patent_no_of_ind_claims] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13747832
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/747832 | Tape film packages and methods of fabricating the same | Jan 22, 2013 | Issued |
Array
(
[id] => 10022232
[patent_doc_number] => 09064725
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-23
[patent_title] => 'FinFET with embedded MOS varactor and method of making same'
[patent_app_type] => utility
[patent_app_number] => 13/715684
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 3738
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715684
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715684 | FinFET with embedded MOS varactor and method of making same | Dec 13, 2012 | Issued |
Array
(
[id] => 9542490
[patent_doc_number] => 20140167137
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'High Voltage Gate Formation'
[patent_app_type] => utility
[patent_app_number] => 13/715739
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[patent_no_of_words] => 5256
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715739
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715739 | High voltage gate formation | Dec 13, 2012 | Issued |
Array
(
[id] => 9542488
[patent_doc_number] => 20140167135
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'Process Charging Protection for Split Gate Charge Trapping Flash'
[patent_app_type] => utility
[patent_app_number] => 13/715705
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 6143
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715705 | Process charging protection for split gate charge trapping flash | Dec 13, 2012 | Issued |
Array
(
[id] => 10178868
[patent_doc_number] => 09209080
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-08
[patent_title] => 'Semiconductor device comprising a protective structure on a chip backside and method of producing the same'
[patent_app_type] => utility
[patent_app_number] => 13/715922
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 32
[patent_no_of_words] => 12001
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 2
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715922
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715922 | Semiconductor device comprising a protective structure on a chip backside and method of producing the same | Dec 13, 2012 | Issued |
Array
(
[id] => 9542625
[patent_doc_number] => 20140167272
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'Semiconductor Device Having an Identification Mark'
[patent_app_type] => utility
[patent_app_number] => 13/716004
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4607
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
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[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13716004
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/716004 | Semiconductor device having an identification mark | Dec 13, 2012 | Issued |
Array
(
[id] => 10178983
[patent_doc_number] => 09209197
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-08
[patent_title] => 'Memory gate landing pad made from dummy features'
[patent_app_type] => utility
[patent_app_number] => 13/715828
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715828
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715828 | Memory gate landing pad made from dummy features | Dec 13, 2012 | Issued |
Array
(
[id] => 9542489
[patent_doc_number] => 20140167136
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'Charge Trapping Device with Improved Select Gate to Memory Gate Isoloation'
[patent_app_type] => utility
[patent_app_number] => 13/715729
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 5946
[patent_no_of_claims] => 26
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[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715729
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715729 | Charge Trapping Device with Improved Select Gate to Memory Gate Isoloation | Dec 13, 2012 | Abandoned |
Array
(
[id] => 9542526
[patent_doc_number] => 20140167173
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'INCREASING THE BREAKDOWN VOLTAGE OF A METAL OXIDE SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/715740
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715740
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715740 | INCREASING THE BREAKDOWN VOLTAGE OF A METAL OXIDE SEMICONDUCTOR DEVICE | Dec 13, 2012 | Abandoned |
Array
(
[id] => 10106634
[patent_doc_number] => 09142417
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-22
[patent_title] => 'Etch process with pre-etch transient conditioning'
[patent_app_type] => utility
[patent_app_number] => 13/715973
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715973 | Etch process with pre-etch transient conditioning | Dec 13, 2012 | Issued |
Array
(
[id] => 9817629
[patent_doc_number] => 08927413
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-01-06
[patent_title] => 'Semiconductor structure and semiconductor fabricating process for the same'
[patent_app_type] => utility
[patent_app_number] => 13/674887
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/674887 | Semiconductor structure and semiconductor fabricating process for the same | Nov 11, 2012 | Issued |
Array
(
[id] => 9079119
[patent_doc_number] => 20130264649
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-10
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/668883
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/668883 | Semiconductor device and method of fabricating the same | Nov 4, 2012 | Issued |
Array
(
[id] => 8811960
[patent_doc_number] => 20130113005
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-09
[patent_title] => 'SEMICONDUCTOR LIGHT EMITTING DEVICE AND FABRICATION METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/669179
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/669179 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND FABRICATION METHOD THEREOF | Nov 4, 2012 | Abandoned |
Array
(
[id] => 10888596
[patent_doc_number] => 08912592
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-16
[patent_title] => 'Non-volatile memory device including etch stop layer pattern'
[patent_app_type] => utility
[patent_app_number] => 13/668854
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/668854 | Non-volatile memory device including etch stop layer pattern | Nov 4, 2012 | Issued |
Array
(
[id] => 9460392
[patent_doc_number] => 20140124817
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-08
[patent_title] => 'Contact Layers'
[patent_app_type] => utility
[patent_app_number] => 13/669171
[patent_app_country] => US
[patent_app_date] => 2012-11-05
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/669171 | Contact Layers | Nov 4, 2012 | Abandoned |
Array
(
[id] => 8913903
[patent_doc_number] => 20130175528
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-11
[patent_title] => 'CHIP ON FILM PACKAGE INCLUDING TEST PADS AND SEMICONDUCTOR DEVICES INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/669031
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/669031 | Chip on film package including test pads and semiconductor devices including the same | Nov 4, 2012 | Issued |
Array
(
[id] => 9844817
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[patent_kind] => B2
[patent_issue_date] => 2015-02-03
[patent_title] => 'Pixel structure of electroluminescent display panel'
[patent_app_type] => utility
[patent_app_number] => 13/669430
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/669430 | Pixel structure of electroluminescent display panel | Nov 4, 2012 | Issued |
Array
(
[id] => 8694814
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[patent_title] => 'SEMICONDUCTOR DEVICES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/603045 | SEMICONDUCTOR DEVICES | Sep 3, 2012 | Abandoned |