Search

Molly Kay Reida

Examiner (ID: 11747, Phone: (571)272-4237 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2816, 2898, 2899
Total Applications
613
Issued Applications
484
Pending Applications
84
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8379797 [patent_doc_number] => 20120223392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/368892 [patent_app_country] => US [patent_app_date] => 2012-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 25269 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13368892 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/368892
SEMICONDUCTOR DEVICE Feb 7, 2012 Abandoned
Array ( [id] => 8937325 [patent_doc_number] => 20130187122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'PHOTONIC DEVICE HAVING EMBEDDED NANO-SCALE STRUCTURES' [patent_app_type] => utility [patent_app_number] => 13/354162 [patent_app_country] => US [patent_app_date] => 2012-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5495 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13354162 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/354162
PHOTONIC DEVICE HAVING EMBEDDED NANO-SCALE STRUCTURES Jan 18, 2012 Abandoned
Array ( [id] => 10059911 [patent_doc_number] => 09099274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-04 [patent_title] => 'Lateral field emission device' [patent_app_type] => utility [patent_app_number] => 13/978797 [patent_app_country] => US [patent_app_date] => 2012-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 27 [patent_no_of_words] => 6025 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13978797 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/978797
Lateral field emission device Jan 9, 2012 Issued
Array ( [id] => 11796997 [patent_doc_number] => 09406853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-02 [patent_title] => 'Method for manufacturing at least one optoelectronic semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/982225 [patent_app_country] => US [patent_app_date] => 2011-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 5342 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13982225 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/982225
Method for manufacturing at least one optoelectronic semiconductor device Dec 20, 2011 Issued
Array ( [id] => 11524526 [patent_doc_number] => 09607937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'Pin grid interposer' [patent_app_type] => utility [patent_app_number] => 13/976194 [patent_app_country] => US [patent_app_date] => 2011-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4860 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976194 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/976194
Pin grid interposer Dec 18, 2011 Issued
Array ( [id] => 7816142 [patent_doc_number] => 20120062762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT AND PHOTOSENSOR CELL WITH SELECTIVELY SILICIDED GATES' [patent_app_type] => utility [patent_app_number] => 13/302810 [patent_app_country] => US [patent_app_date] => 2011-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7702 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20120062762.pdf [firstpage_image] =>[orig_patent_app_number] => 13302810 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/302810
METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT AND PHOTOSENSOR CELL WITH SELECTIVELY SILICIDED GATES Nov 21, 2011 Abandoned
Array ( [id] => 9552857 [patent_doc_number] => 08759908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-24 [patent_title] => 'Two-dimensional shielded gate transistor device and method of manufacture' [patent_app_type] => utility [patent_app_number] => 13/286733 [patent_app_country] => US [patent_app_date] => 2011-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 3645 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13286733 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/286733
Two-dimensional shielded gate transistor device and method of manufacture Oct 31, 2011 Issued
Array ( [id] => 9939022 [patent_doc_number] => 08988839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Block power switch with embedded electrostatic discharge (ESD) protection and adaptive body biasing' [patent_app_type] => utility [patent_app_number] => 13/286498 [patent_app_country] => US [patent_app_date] => 2011-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4157 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13286498 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/286498
Block power switch with embedded electrostatic discharge (ESD) protection and adaptive body biasing Oct 31, 2011 Issued
Array ( [id] => 8180065 [patent_doc_number] => 20120112240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/286832 [patent_app_country] => US [patent_app_date] => 2011-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7183 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20120112240.pdf [firstpage_image] =>[orig_patent_app_number] => 13286832 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/286832
LDMOS semiconductor device with parasitic bipolar transistor for reduced surge current Oct 31, 2011 Issued
Array ( [id] => 8764960 [patent_doc_number] => 20130092997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'NON-VOLATILE MEMORY AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/271517 [patent_app_country] => US [patent_app_date] => 2011-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5752 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13271517 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/271517
Non-volatile memory Oct 11, 2011 Issued
Array ( [id] => 8154542 [patent_doc_number] => 20120097941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/271518 [patent_app_country] => US [patent_app_date] => 2011-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6818 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20120097941.pdf [firstpage_image] =>[orig_patent_app_number] => 13271518 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/271518
Thin film transistor including buffer layers with high resistivity Oct 11, 2011 Issued
Array ( [id] => 8123029 [patent_doc_number] => 20120086063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/271495 [patent_app_country] => US [patent_app_date] => 2011-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7189 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20120086063.pdf [firstpage_image] =>[orig_patent_app_number] => 13271495 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/271495
Dynamic memory device with improved bitline connection region Oct 11, 2011 Issued
Array ( [id] => 9047294 [patent_doc_number] => 08541848 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-24 [patent_title] => 'High-voltage MOSFETs having current diversion region in substrate near fieldplate' [patent_app_type] => utility [patent_app_number] => 13/271342 [patent_app_country] => US [patent_app_date] => 2011-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2998 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13271342 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/271342
High-voltage MOSFETs having current diversion region in substrate near fieldplate Oct 11, 2011 Issued
Array ( [id] => 9832343 [patent_doc_number] => 08941162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-27 [patent_title] => 'Semiconductor device, method for forming the same, and data processing system' [patent_app_type] => utility [patent_app_number] => 13/270574 [patent_app_country] => US [patent_app_date] => 2011-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 89 [patent_no_of_words] => 20795 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13270574 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/270574
Semiconductor device, method for forming the same, and data processing system Oct 10, 2011 Issued
Array ( [id] => 8753616 [patent_doc_number] => 20130087920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-11 [patent_title] => 'Integrated Circuit Structure Having Dies with Connectors of Different Sizes' [patent_app_type] => utility [patent_app_number] => 13/270776 [patent_app_country] => US [patent_app_date] => 2011-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3931 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13270776 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/270776
Integrated circuit structure having dies with connectors of different sizes Oct 10, 2011 Issued
Array ( [id] => 8753575 [patent_doc_number] => 20130087879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-11 [patent_title] => 'SCHOTTKY DIODE WITH BURIED LAYER IN GAN MATERIALS' [patent_app_type] => utility [patent_app_number] => 13/270641 [patent_app_country] => US [patent_app_date] => 2011-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 8286 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13270641 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/270641
Schottky diode with buried layer in GaN materials Oct 10, 2011 Issued
Array ( [id] => 8154691 [patent_doc_number] => 20120098023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'NITRIDE SEMICONDUCTOR LIGHT-EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/317101 [patent_app_country] => US [patent_app_date] => 2011-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6054 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20120098023.pdf [firstpage_image] =>[orig_patent_app_number] => 13317101 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/317101
NITRIDE SEMICONDUCTOR LIGHT-EMITTING DEVICE Oct 10, 2011 Abandoned
Array ( [id] => 8133915 [patent_doc_number] => 20120091509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'SILICON-GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/271126 [patent_app_country] => US [patent_app_date] => 2011-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3953 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20120091509.pdf [firstpage_image] =>[orig_patent_app_number] => 13271126 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/271126
Silicon-germanium heterojunction bipolar transistor Oct 10, 2011 Issued
Array ( [id] => 8753531 [patent_doc_number] => 20130087835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-11 [patent_title] => 'METHOD AND SYSTEM FOR FLOATING GUARD RINGS IN GAN MATERIALS' [patent_app_type] => utility [patent_app_number] => 13/270606 [patent_app_country] => US [patent_app_date] => 2011-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7622 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13270606 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/270606
Method and system for floating guard rings in gallium nitride materials Oct 10, 2011 Issued
Array ( [id] => 8937365 [patent_doc_number] => 20130187162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'THIN FILM TRANSISTOR SUBSTRATE AND PROCESS FOR PRODUCTION THEREOF' [patent_app_type] => utility [patent_app_number] => 13/877714 [patent_app_country] => US [patent_app_date] => 2011-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8680 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13877714 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/877714
Process for production of thin film transistor substrate Sep 28, 2011 Issued
Menu