Search

Mong-thuy Thi Tran

Examiner (ID: 467, Phone: (571)270-3199 , Office: P/2646 )

Most Active Art Unit
2645
Art Unit(s)
2617, 2646, 2645, 2469
Total Applications
820
Issued Applications
681
Pending Applications
54
Abandoned Applications
103

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18848893 [patent_doc_number] => 20230411297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => Active Silicon D2D Bridge [patent_app_type] => utility [patent_app_number] => 17/841188 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17841188 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/841188
Active Silicon D2D Bridge Jun 14, 2022 Pending
Array ( [id] => 19213670 [patent_doc_number] => 12002742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Semiconductor package structure [patent_app_type] => utility [patent_app_number] => 17/838412 [patent_app_country] => US [patent_app_date] => 2022-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 8405 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17838412 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/838412
Semiconductor package structure Jun 12, 2022 Issued
Array ( [id] => 17886573 [patent_doc_number] => 20220302051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => DEVICE, SYSTEM AND METHOD FOR PROVIDING INDUCTOR STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/836117 [patent_app_country] => US [patent_app_date] => 2022-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17836117 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/836117
Device, system and method for providing inductor structures Jun 8, 2022 Issued
Array ( [id] => 18392733 [patent_doc_number] => 20230160953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => INTERCONNECT STRUCTURES IN INTEGRATED CIRCUIT CHIPS [patent_app_type] => utility [patent_app_number] => 17/832488 [patent_app_country] => US [patent_app_date] => 2022-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9772 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17832488 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/832488
INTERCONNECT STRUCTURES IN INTEGRATED CIRCUIT CHIPS Jun 2, 2022 Pending
Array ( [id] => 18823075 [patent_doc_number] => 20230397416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => Metal Hardmasks [patent_app_type] => utility [patent_app_number] => 17/831695 [patent_app_country] => US [patent_app_date] => 2022-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6718 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17831695 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/831695
Metal hardmasks Jun 2, 2022 Issued
Array ( [id] => 17870832 [patent_doc_number] => 20220293569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => THREE-DIMENSIONAL STACKING SEMICONDUCTOR ASSEMBLIES WITH NEAR ZERO BOND LINE THICKNESS [patent_app_type] => utility [patent_app_number] => 17/832019 [patent_app_country] => US [patent_app_date] => 2022-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6695 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17832019 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/832019
Three-dimensional stacking semiconductor assemblies with near zero bond line thickness Jun 2, 2022 Issued
Array ( [id] => 20204152 [patent_doc_number] => 12406936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Semiconductor package with substrate recess and methods for forming the same [patent_app_type] => utility [patent_app_number] => 17/829552 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 28 [patent_no_of_words] => 8816 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17829552 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/829552
Semiconductor package with substrate recess and methods for forming the same May 31, 2022 Issued
Array ( [id] => 19341426 [patent_doc_number] => 12051621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Microelectronic assembly from processed substrate [patent_app_type] => utility [patent_app_number] => 17/825405 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6231 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17825405 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/825405
Microelectronic assembly from processed substrate May 25, 2022 Issued
Array ( [id] => 17840728 [patent_doc_number] => 20220278034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/749218 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10924 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749218 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/749218
Semiconductor structure and manufacturing method thereof May 19, 2022 Issued
Array ( [id] => 18857280 [patent_doc_number] => 11854875 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Contact structure of a semiconductor device [patent_app_type] => utility [patent_app_number] => 17/664129 [patent_app_country] => US [patent_app_date] => 2022-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 7501 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17664129 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/664129
Contact structure of a semiconductor device May 18, 2022 Issued
Array ( [id] => 18798579 [patent_doc_number] => 11832447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Memory arrays, and methods of forming memory arrays [patent_app_type] => utility [patent_app_number] => 17/746671 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 29 [patent_no_of_words] => 8035 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746671 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/746671
Memory arrays, and methods of forming memory arrays May 16, 2022 Issued
Array ( [id] => 18999175 [patent_doc_number] => 11916031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Semiconductor device and method of manufacturing [patent_app_type] => utility [patent_app_number] => 17/745225 [patent_app_country] => US [patent_app_date] => 2022-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 9743 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17745225 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/745225
Semiconductor device and method of manufacturing May 15, 2022 Issued
Array ( [id] => 19063187 [patent_doc_number] => 11942439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Semiconductor package structure [patent_app_type] => utility [patent_app_number] => 17/744297 [patent_app_country] => US [patent_app_date] => 2022-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 11857 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17744297 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/744297
Semiconductor package structure May 12, 2022 Issued
Array ( [id] => 20484256 [patent_doc_number] => 12532737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Semiconductor device package thermally coupled to passive element [patent_app_type] => utility [patent_app_number] => 17/742666 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1146 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17742666 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/742666
Semiconductor device package thermally coupled to passive element May 11, 2022 Issued
Array ( [id] => 18891072 [patent_doc_number] => 11869849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Semiconductor package with EMI shielding structure [patent_app_type] => utility [patent_app_number] => 17/739196 [patent_app_country] => US [patent_app_date] => 2022-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4893 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17739196 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/739196
Semiconductor package with EMI shielding structure May 8, 2022 Issued
Array ( [id] => 18269889 [patent_doc_number] => 20230091131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/739329 [patent_app_country] => US [patent_app_date] => 2022-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7870 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17739329 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/739329
Semiconductor package and method of manufacturing the semiconductor package May 8, 2022 Issued
Array ( [id] => 17949249 [patent_doc_number] => 20220336268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => CONTACT FORMATION METHOD AND RELATED STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/661734 [patent_app_country] => US [patent_app_date] => 2022-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17661734 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/661734
Contact formation method and related structure May 1, 2022 Issued
Array ( [id] => 19957319 [patent_doc_number] => 12327736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-10 [patent_title] => Multilayer package substrate with improved current density distribution [patent_app_type] => utility [patent_app_number] => 17/733998 [patent_app_country] => US [patent_app_date] => 2022-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 2192 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17733998 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/733998
Multilayer package substrate with improved current density distribution Apr 29, 2022 Issued
Array ( [id] => 20332838 [patent_doc_number] => 12463123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Multi-chip system-in-package [patent_app_type] => utility [patent_app_number] => 17/661420 [patent_app_country] => US [patent_app_date] => 2022-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 29 [patent_no_of_words] => 4380 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17661420 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/661420
Multi-chip system-in-package Apr 28, 2022 Issued
Array ( [id] => 20216180 [patent_doc_number] => 12412834 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Triple-sided module [patent_app_type] => utility [patent_app_number] => 17/727586 [patent_app_country] => US [patent_app_date] => 2022-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2143 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17727586 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/727586
Triple-sided module Apr 21, 2022 Issued
Menu