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Mong-thuy Thi Tran

Examiner (ID: 467, Phone: (571)270-3199 , Office: P/2646 )

Most Active Art Unit
2645
Art Unit(s)
2617, 2646, 2645, 2469
Total Applications
820
Issued Applications
681
Pending Applications
54
Abandoned Applications
103

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19023185 [patent_doc_number] => 20240079356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => Integrated Circuit Packages and Methods of Forming the Same [patent_app_type] => utility [patent_app_number] => 18/151623 [patent_app_country] => US [patent_app_date] => 2023-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18151623 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/151623
Integrated Circuit Packages and Methods of Forming the Same Jan 8, 2023 Pending
Array ( [id] => 19305712 [patent_doc_number] => 20240234292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => Semiconductor Device and Method of Making a Semiconductor Package with Graphene-Coated Interconnects [patent_app_type] => utility [patent_app_number] => 18/150634 [patent_app_country] => US [patent_app_date] => 2023-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4209 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18150634 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/150634
Semiconductor Device and Method of Making a Semiconductor Package with Graphene-Coated Interconnects Jan 4, 2023 Pending
Array ( [id] => 18959182 [patent_doc_number] => 20240047509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => Packages with Chips Comprising Inductor-Vias and Methods Forming the Same [patent_app_type] => utility [patent_app_number] => 18/150624 [patent_app_country] => US [patent_app_date] => 2023-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7830 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18150624 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/150624
Packages with Chips Comprising Inductor-Vias and Methods Forming the Same Jan 4, 2023 Pending
Array ( [id] => 18363472 [patent_doc_number] => 20230145063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => Process Control for Package Formation [patent_app_type] => utility [patent_app_number] => 18/149472 [patent_app_country] => US [patent_app_date] => 2023-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149472 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/149472
Process control for package formation Jan 2, 2023 Issued
Array ( [id] => 18362590 [patent_doc_number] => 20230144181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => CERAMIC LAMINATED SUBSTRATE, MODULE, AND METHOD OF MANUFACTURING CERAMIC LAMINATED SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/149205 [patent_app_country] => US [patent_app_date] => 2023-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5869 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149205 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/149205
Ceramic laminated substrate, module, and method of manufacturing ceramic laminated substrate Jan 2, 2023 Issued
Array ( [id] => 19161177 [patent_doc_number] => 20240153884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/148440 [patent_app_country] => US [patent_app_date] => 2022-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5148 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18148440 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/148440
ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF Dec 29, 2022 Pending
Array ( [id] => 18345125 [patent_doc_number] => 20230133235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => MICROELECTRONIC ASSEMBLIES [patent_app_type] => utility [patent_app_number] => 18/090801 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090801 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/090801
Microelectronic assemblies Dec 28, 2022 Issued
Array ( [id] => 18865899 [patent_doc_number] => 20230420336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => FAN-OUT TYPE SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/085859 [patent_app_country] => US [patent_app_date] => 2022-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5496 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18085859 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/085859
FAN-OUT TYPE SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME Dec 20, 2022 Pending
Array ( [id] => 18473195 [patent_doc_number] => 20230207483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => ISOLATED TRANSFORMER WITH INTEGRATED SHIELD TOPOLOGY FOR REDUCED EMI [patent_app_type] => utility [patent_app_number] => 18/086610 [patent_app_country] => US [patent_app_date] => 2022-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8178 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 1 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18086610 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/086610
Isolated transformer with integrated shield topology for reduced EMI Dec 20, 2022 Issued
Array ( [id] => 19252898 [patent_doc_number] => 20240203895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => THROUGH MOLDING CONTACT ENABLED EMI SHIELDING [patent_app_type] => utility [patent_app_number] => 18/067565 [patent_app_country] => US [patent_app_date] => 2022-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18067565 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/067565
THROUGH MOLDING CONTACT ENABLED EMI SHIELDING Dec 15, 2022 Pending
Array ( [id] => 18325120 [patent_doc_number] => 20230123248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => ARRAY SUBSTRATE AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 18/067494 [patent_app_country] => US [patent_app_date] => 2022-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18067494 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/067494
ARRAY SUBSTRATE AND DISPLAY PANEL Dec 15, 2022 Pending
Array ( [id] => 19252806 [patent_doc_number] => 20240203803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/082012 [patent_app_country] => US [patent_app_date] => 2022-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6503 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18082012 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/082012
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES Dec 14, 2022 Pending
Array ( [id] => 18456295 [patent_doc_number] => 20230197577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => Semiconductor Devices Including a Premolded Leadframe and a Semiconductor Package [patent_app_type] => utility [patent_app_number] => 18/082238 [patent_app_country] => US [patent_app_date] => 2022-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18082238 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/082238
Semiconductor Devices Including a Premolded Leadframe and a Semiconductor Package Dec 14, 2022 Pending
Array ( [id] => 19252941 [patent_doc_number] => 20240203938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => INTEGRATED BARE DIE PACKAGE, AND RELATED FABRICATION METHODS [patent_app_type] => utility [patent_app_number] => 18/066448 [patent_app_country] => US [patent_app_date] => 2022-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18066448 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/066448
INTEGRATED BARE DIE PACKAGE, AND RELATED FABRICATION METHODS Dec 14, 2022 Pending
Array ( [id] => 19252971 [patent_doc_number] => 20240203968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => CHIP PACKAGE INTEGRATION WITH HYBRID BONDED BRIDGE DIE [patent_app_type] => utility [patent_app_number] => 18/081461 [patent_app_country] => US [patent_app_date] => 2022-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6525 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18081461 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/081461
CHIP PACKAGE INTEGRATION WITH HYBRID BONDED BRIDGE DIE Dec 13, 2022 Pending
Array ( [id] => 19596020 [patent_doc_number] => 12153868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Integrated circuit having non-integral multiple pitch [patent_app_type] => utility [patent_app_number] => 18/064027 [patent_app_country] => US [patent_app_date] => 2022-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3748 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064027 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/064027
Integrated circuit having non-integral multiple pitch Dec 8, 2022 Issued
Array ( [id] => 20360223 [patent_doc_number] => 12476229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Electronic package [patent_app_type] => utility [patent_app_number] => 18/063442 [patent_app_country] => US [patent_app_date] => 2022-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 1060 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18063442 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/063442
Electronic package Dec 7, 2022 Issued
Array ( [id] => 18927180 [patent_doc_number] => 20240030184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/063065 [patent_app_country] => US [patent_app_date] => 2022-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7498 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18063065 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/063065
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Dec 6, 2022 Pending
Array ( [id] => 19206256 [patent_doc_number] => 20240178155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => MULTILEVEL PACKAGE SUBSTRATE WITH BOX SHIELD [patent_app_type] => utility [patent_app_number] => 18/071972 [patent_app_country] => US [patent_app_date] => 2022-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18071972 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/071972
MULTILEVEL PACKAGE SUBSTRATE WITH BOX SHIELD Nov 29, 2022 Pending
Array ( [id] => 19206183 [patent_doc_number] => 20240178082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/071797 [patent_app_country] => US [patent_app_date] => 2022-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18071797 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/071797
PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME Nov 29, 2022 Pending
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