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Mong-thuy Thi Tran

Examiner (ID: 467, Phone: (571)270-3199 , Office: P/2646 )

Most Active Art Unit
2645
Art Unit(s)
2617, 2646, 2645, 2469
Total Applications
820
Issued Applications
681
Pending Applications
54
Abandoned Applications
103

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19206255 [patent_doc_number] => 20240178154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => ELECTRONIC DEVICE PACKAGE EMI SHIELDING WITH GROUNDED MOLD INTERCONNECT [patent_app_type] => utility [patent_app_number] => 18/070708 [patent_app_country] => US [patent_app_date] => 2022-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18070708 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/070708
ELECTRONIC DEVICE PACKAGE EMI SHIELDING WITH GROUNDED MOLD INTERCONNECT Nov 28, 2022 Pending
Array ( [id] => 18266790 [patent_doc_number] => 20230088032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/059747 [patent_app_country] => US [patent_app_date] => 2022-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18059747 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/059747
Semiconductor package and method of fabricating the same Nov 28, 2022 Issued
Array ( [id] => 19191524 [patent_doc_number] => 20240170437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/993798 [patent_app_country] => US [patent_app_date] => 2022-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9405 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17993798 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/993798
PACKAGE STRUCTURE Nov 22, 2022 Pending
Array ( [id] => 19101088 [patent_doc_number] => 20240120316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => SEMICONDUCTOR PACKAGE, SEMICONDUCTOR BONDING STRUCTURE, AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/989635 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5309 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989635 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989635
SEMICONDUCTOR PACKAGE, SEMICONDUCTOR BONDING STRUCTURE, AND METHOD OF FABRICATING THE SAME Nov 16, 2022 Pending
Array ( [id] => 18394882 [patent_doc_number] => 20230163103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => STACKED DIE PACKAGE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/989396 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7220 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989396 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989396
STACKED DIE PACKAGE AND METHODS OF FORMING THE SAME Nov 16, 2022 Pending
Array ( [id] => 18226082 [patent_doc_number] => 20230065076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/054295 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18054295 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/054295
Semiconductor package and method of fabricating the same Nov 9, 2022 Issued
Array ( [id] => 18500559 [patent_doc_number] => 20230223353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/976775 [patent_app_country] => US [patent_app_date] => 2022-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17976775 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/976775
SEMICONDUCTOR PACKAGE Oct 28, 2022 Pending
Array ( [id] => 18241752 [patent_doc_number] => 20230074063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => DEVICES COMPRISING CRYSTALLINE MATERIALS [patent_app_type] => utility [patent_app_number] => 18/050772 [patent_app_country] => US [patent_app_date] => 2022-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5109 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18050772 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/050772
Devices comprising crystalline materials Oct 27, 2022 Issued
Array ( [id] => 18195316 [patent_doc_number] => 20230048835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => COMPOSITE BRIDGE DIE-TO-DIE INTERCONNECTS FOR INTEGRATED-CIRCUIT PACKAGES [patent_app_type] => utility [patent_app_number] => 17/975223 [patent_app_country] => US [patent_app_date] => 2022-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17975223 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/975223
Composite bridge die-to-die interconnects for integrated-circuit packages Oct 26, 2022 Issued
Array ( [id] => 19101060 [patent_doc_number] => 20240120288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/962354 [patent_app_country] => US [patent_app_date] => 2022-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13698 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17962354 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/962354
ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME Oct 6, 2022 Pending
Array ( [id] => 19460224 [patent_doc_number] => 12100734 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Low leakage FET [patent_app_type] => utility [patent_app_number] => 17/961372 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 8845 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17961372 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/961372
Low leakage FET Oct 5, 2022 Issued
Array ( [id] => 19704935 [patent_doc_number] => 12198982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Laser dicing for singulation [patent_app_type] => utility [patent_app_number] => 17/960568 [patent_app_country] => US [patent_app_date] => 2022-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 4628 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960568 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960568
Laser dicing for singulation Oct 4, 2022 Issued
Array ( [id] => 19071144 [patent_doc_number] => 20240105570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => TRANSISTOR PACKAGE AND PROCESS OF IMPLEMENTING THE TRANSISTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/951527 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14629 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17951527 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/951527
TRANSISTOR PACKAGE AND PROCESS OF IMPLEMENTING THE TRANSISTOR PACKAGE Sep 22, 2022 Pending
Array ( [id] => 18333291 [patent_doc_number] => 20230125239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/934233 [patent_app_country] => US [patent_app_date] => 2022-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6217 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934233 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934233
SEMICONDUCTOR PACKAGE STRUCTURE Sep 21, 2022 Pending
Array ( [id] => 18271712 [patent_doc_number] => 20230092954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => Electronic Package with Components Mounted at Two Sides of a Layer Stack [patent_app_type] => utility [patent_app_number] => 17/933069 [patent_app_country] => US [patent_app_date] => 2022-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12170 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17933069 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/933069
Electronic Package with Components Mounted at Two Sides of a Layer Stack Sep 15, 2022 Pending
Array ( [id] => 19038266 [patent_doc_number] => 20240088081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => DIE PACKAGE WITH SEALED DIE ENCLOSURES [patent_app_type] => utility [patent_app_number] => 17/932209 [patent_app_country] => US [patent_app_date] => 2022-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -38 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17932209 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/932209
DIE PACKAGE WITH SEALED DIE ENCLOSURES Sep 13, 2022 Pending
Array ( [id] => 19407195 [patent_doc_number] => 20240290706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => CHIP STRUCTURE, METHOD FOR MANUFACTURING CHIP STRUCTURE, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/024109 [patent_app_country] => US [patent_app_date] => 2022-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18024109 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/024109
CHIP STRUCTURE, METHOD FOR MANUFACTURING CHIP STRUCTURE, AND ELECTRONIC DEVICE Sep 8, 2022 Pending
Array ( [id] => 20346075 [patent_doc_number] => 12469810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 17/939127 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 9792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939127 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/939127
Semiconductor package Sep 6, 2022 Issued
Array ( [id] => 18097734 [patent_doc_number] => 20220416075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => VERTICAL SEMICONDUCTOR DEVICE WITH IMPROVED RUGGEDNESS [patent_app_type] => utility [patent_app_number] => 17/929858 [patent_app_country] => US [patent_app_date] => 2022-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9301 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17929858 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/929858
Vertical semiconductor device with improved ruggedness Sep 5, 2022 Issued
Array ( [id] => 18351140 [patent_doc_number] => 20230139251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => DUAL SIDED MOLDED PACKAGE WITH VARYING INTERCONNECT PAD SIZES AND VARYING EXPOSED SOLDERABLE AREA [patent_app_type] => utility [patent_app_number] => 17/929499 [patent_app_country] => US [patent_app_date] => 2022-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17929499 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/929499
DUAL SIDED MOLDED PACKAGE WITH VARYING INTERCONNECT PAD SIZES AND VARYING EXPOSED SOLDERABLE AREA Sep 1, 2022 Pending
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