Search

Monica Lewis

Supervisory Patent Examiner (ID: 18105, Phone: (571)272-1838 , Office: P/2838 )

Most Active Art Unit
2822
Art Unit(s)
2822, 2306, 2787, 2894, 2838, 2786
Total Applications
496
Issued Applications
294
Pending Applications
25
Abandoned Applications
178

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1090051 [patent_doc_number] => 06828605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-07 [patent_title] => 'Field-effect-controlled semiconductor component and method of fabricating a doping layer in a vertically configured semiconductor component' [patent_app_type] => B2 [patent_app_number] => 10/013997 [patent_app_country] => US [patent_app_date] => 2001-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6331 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/828/06828605.pdf [firstpage_image] =>[orig_patent_app_number] => 10013997 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/013997
Field-effect-controlled semiconductor component and method of fabricating a doping layer in a vertically configured semiconductor component Dec 10, 2001 Issued
Array ( [id] => 6694917 [patent_doc_number] => 20030107111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'A 3-D MICROELECTRONIC STRUCTURE INCLUDING A VERTICAL THERMAL NITRIDE MASK' [patent_app_type] => new [patent_app_number] => 10/013797 [patent_app_country] => US [patent_app_date] => 2001-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3673 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20030107111.pdf [firstpage_image] =>[orig_patent_app_number] => 10013797 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/013797
A 3-D MICROELECTRONIC STRUCTURE INCLUDING A VERTICAL THERMAL NITRIDE MASK Dec 9, 2001 Abandoned
Array ( [id] => 6694893 [patent_doc_number] => 20030107087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'DUAL GATE OXIDE HIGH-VOLTAGE SEMICONDUCTOR DEVICE' [patent_app_type] => new [patent_app_number] => 10/015847 [patent_app_country] => US [patent_app_date] => 2001-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2364 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20030107087.pdf [firstpage_image] =>[orig_patent_app_number] => 10015847 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/015847
Dual gate oxide high-voltage semiconductor device Dec 9, 2001 Issued
Array ( [id] => 6694922 [patent_doc_number] => 20030107116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'WINDOWFRAME CAPACITOR' [patent_app_type] => new [patent_app_number] => 10/010237 [patent_app_country] => US [patent_app_date] => 2001-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1704 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20030107116.pdf [firstpage_image] =>[orig_patent_app_number] => 10010237 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/010237
WINDOWFRAME CAPACITOR Dec 6, 2001 Abandoned
Array ( [id] => 6123506 [patent_doc_number] => 20020074628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Flexible wiring film, and semiconductor apparatus and system using the same' [patent_app_type] => new [patent_app_number] => 10/005697 [patent_app_country] => US [patent_app_date] => 2001-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4287 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20020074628.pdf [firstpage_image] =>[orig_patent_app_number] => 10005697 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/005697
Flexible wiring film, and semiconductor apparatus and system using the same Dec 6, 2001 Abandoned
Array ( [id] => 6694839 [patent_doc_number] => 20030107033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Trilayer heterostructure junctions' [patent_app_type] => new [patent_app_number] => 10/006787 [patent_app_country] => US [patent_app_date] => 2001-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8461 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20030107033.pdf [firstpage_image] =>[orig_patent_app_number] => 10006787 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/006787
Trilayer heterostructure junctions Dec 5, 2001 Abandoned
Array ( [id] => 6649734 [patent_doc_number] => 20030104687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Temporary chip attach structure with thin films' [patent_app_type] => new [patent_app_number] => 10/007097 [patent_app_country] => US [patent_app_date] => 2001-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3875 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20030104687.pdf [firstpage_image] =>[orig_patent_app_number] => 10007097 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/007097
Temporary chip attach structure with thin films Dec 3, 2001 Abandoned
Array ( [id] => 979389 [patent_doc_number] => 06930395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Circuit substrate having improved connection reliability and a method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 09/998327 [patent_app_country] => US [patent_app_date] => 2001-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 38 [patent_no_of_words] => 10688 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930395.pdf [firstpage_image] =>[orig_patent_app_number] => 09998327 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/998327
Circuit substrate having improved connection reliability and a method for manufacturing the same Dec 2, 2001 Issued
Array ( [id] => 1031489 [patent_doc_number] => 06879027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-12 [patent_title] => 'Semiconductor device having bumps' [patent_app_type] => utility [patent_app_number] => 09/998467 [patent_app_country] => US [patent_app_date] => 2001-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3200 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/879/06879027.pdf [firstpage_image] =>[orig_patent_app_number] => 09998467 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/998467
Semiconductor device having bumps Nov 28, 2001 Issued
Array ( [id] => 6594510 [patent_doc_number] => 20020063324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-30 [patent_title] => 'Semiconductor device, method of fabricating same, semiconductor device package construction, and method of mounting the semiconductor device' [patent_app_type] => new [patent_app_number] => 09/994957 [patent_app_country] => US [patent_app_date] => 2001-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8914 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20020063324.pdf [firstpage_image] =>[orig_patent_app_number] => 09994957 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/994957
Semiconductor device, method of fabricating same, semiconductor device package construction, and method of mounting the semiconductor device Nov 26, 2001 Abandoned
Array ( [id] => 6357452 [patent_doc_number] => 20020058150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'Method for processing a semiconductor substrate having a copper surface disposed thereon and structure formed' [patent_app_type] => new [patent_app_number] => 09/995283 [patent_app_country] => US [patent_app_date] => 2001-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2008 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20020058150.pdf [firstpage_image] =>[orig_patent_app_number] => 09995283 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/995283
Method for processing a semiconductor substrate having a copper surface disposed thereon and structure formed Nov 26, 2001 Abandoned
Array ( [id] => 6130084 [patent_doc_number] => 20020076880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 09/993967 [patent_app_country] => US [patent_app_date] => 2001-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 9161 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20020076880.pdf [firstpage_image] =>[orig_patent_app_number] => 09993967 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/993967
Semiconductor device with vertical transistor formed in a silicon-on-insulator substrate Nov 26, 2001 Issued
Array ( [id] => 7612453 [patent_doc_number] => 06903383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'Semiconductor device having a high breakdown voltage for use in communication systems' [patent_app_type] => utility [patent_app_number] => 10/343097 [patent_app_country] => US [patent_app_date] => 2001-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 42 [patent_no_of_words] => 21787 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/903/06903383.pdf [firstpage_image] =>[orig_patent_app_number] => 10343097 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/343097
Semiconductor device having a high breakdown voltage for use in communication systems Nov 20, 2001 Issued
Array ( [id] => 6686376 [patent_doc_number] => 20030030099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Flash memory structure' [patent_app_type] => new [patent_app_number] => 09/990397 [patent_app_country] => US [patent_app_date] => 2001-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2482 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20030030099.pdf [firstpage_image] =>[orig_patent_app_number] => 09990397 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/990397
Flash memory structure Nov 19, 2001 Abandoned
Array ( [id] => 5933324 [patent_doc_number] => 20020060316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-23 [patent_title] => 'Semiconductor optical device' [patent_app_type] => new [patent_app_number] => 09/990157 [patent_app_country] => US [patent_app_date] => 2001-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7020 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20020060316.pdf [firstpage_image] =>[orig_patent_app_number] => 09990157 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/990157
Semiconductor optical device Nov 19, 2001 Abandoned
Array ( [id] => 6123565 [patent_doc_number] => 20020074647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Device for a clocked semiconductor chip' [patent_app_type] => new [patent_app_number] => 09/988497 [patent_app_country] => US [patent_app_date] => 2001-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1422 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20020074647.pdf [firstpage_image] =>[orig_patent_app_number] => 09988497 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/988497
Device for a clocked semiconductor chip Nov 18, 2001 Abandoned
Array ( [id] => 1318998 [patent_doc_number] => 06608349 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Narrow/short high performance MOSFET device design' [patent_app_type] => B1 [patent_app_number] => 10/054317 [patent_app_country] => US [patent_app_date] => 2001-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2023 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/608/06608349.pdf [firstpage_image] =>[orig_patent_app_number] => 10054317 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/054317
Narrow/short high performance MOSFET device design Nov 12, 2001 Issued
Array ( [id] => 1140949 [patent_doc_number] => 06781203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-24 [patent_title] => 'MOSFET with reduced threshold voltage and on resistance and process for its manufacture' [patent_app_type] => B2 [patent_app_number] => 10/044427 [patent_app_country] => US [patent_app_date] => 2001-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1857 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/781/06781203.pdf [firstpage_image] =>[orig_patent_app_number] => 10044427 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/044427
MOSFET with reduced threshold voltage and on resistance and process for its manufacture Nov 8, 2001 Issued
Array ( [id] => 1140932 [patent_doc_number] => 06781199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-24 [patent_title] => 'Semiconductor device having first and second trenches with no control electrode formed in the second trench' [patent_app_type] => B2 [patent_app_number] => 09/986277 [patent_app_country] => US [patent_app_date] => 2001-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 11237 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/781/06781199.pdf [firstpage_image] =>[orig_patent_app_number] => 09986277 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/986277
Semiconductor device having first and second trenches with no control electrode formed in the second trench Nov 7, 2001 Issued
Array ( [id] => 949457 [patent_doc_number] => 06963493 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-08 [patent_title] => 'Multilayer electronic devices with via components' [patent_app_type] => utility [patent_app_number] => 10/006777 [patent_app_country] => US [patent_app_date] => 2001-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 4617 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 335 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/963/06963493.pdf [firstpage_image] =>[orig_patent_app_number] => 10006777 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/006777
Multilayer electronic devices with via components Nov 7, 2001 Issued
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