
Monica Lewis
Supervisory Patent Examiner (ID: 18105, Phone: (571)272-1838 , Office: P/2838 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822, 2306, 2787, 2894, 2838, 2786 |
| Total Applications | 496 |
| Issued Applications | 294 |
| Pending Applications | 25 |
| Abandoned Applications | 178 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6792122
[patent_doc_number] => 20030087466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-08
[patent_title] => 'Phototransistor device'
[patent_app_type] => new
[patent_app_number] => 09/985877
[patent_app_country] => US
[patent_app_date] => 2001-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3127
[patent_no_of_claims] => 11
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[patent_words_short_claim] => 22
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0087/20030087466.pdf
[firstpage_image] =>[orig_patent_app_number] => 09985877
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/985877 | Phototransistor device | Nov 5, 2001 | Abandoned |
Array
(
[id] => 6092059
[patent_doc_number] => 20020050629
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-02
[patent_title] => 'Semiconductor passivation deposition process for interfacial adhesion'
[patent_app_type] => new
[patent_app_number] => 10/013103
[patent_app_country] => US
[patent_app_date] => 2001-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 6185
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0050/20020050629.pdf
[firstpage_image] =>[orig_patent_app_number] => 10013103
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/013103 | Semiconductor passivation deposition process for interfacial adhesion | Nov 5, 2001 | Issued |
Array
(
[id] => 1347459
[patent_doc_number] => 06586833
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-07-01
[patent_title] => 'Packaged power devices having vertical power mosfets therein that are flip-chip mounted to slotted gate electrode strip lines'
[patent_app_type] => B2
[patent_app_number] => 09/992233
[patent_app_country] => US
[patent_app_date] => 2001-11-05
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/586/06586833.pdf
[firstpage_image] =>[orig_patent_app_number] => 09992233
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/992233 | Packaged power devices having vertical power mosfets therein that are flip-chip mounted to slotted gate electrode strip lines | Nov 4, 2001 | Issued |
Array
(
[id] => 6790080
[patent_doc_number] => 20030085424
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-08
[patent_title] => 'Transistor structure with thick recessed source/drain structures and fabrication process of same'
[patent_app_type] => new
[patent_app_number] => 09/682957
[patent_app_country] => US
[patent_app_date] => 2001-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6955
[patent_no_of_claims] => 20
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[pdf_file] => publications/A1/0085/20030085424.pdf
[firstpage_image] =>[orig_patent_app_number] => 09682957
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/682957 | Transistor structure with thick recessed source/drain structures and fabrication process of same | Nov 1, 2001 | Issued |
Array
(
[id] => 5874097
[patent_doc_number] => 20020048916
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-25
[patent_title] => 'Thinned, stackable semiconductor device having low profile'
[patent_app_type] => new
[patent_app_number] => 10/016567
[patent_app_country] => US
[patent_app_date] => 2001-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 6239
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[pdf_file] => publications/A1/0048/20020048916.pdf
[firstpage_image] =>[orig_patent_app_number] => 10016567
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/016567 | Thinned, stackable semiconductor device having low profile | Oct 29, 2001 | Abandoned |
Array
(
[id] => 5812979
[patent_doc_number] => 20020038868
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-04
[patent_title] => 'Photodiode and light receiving device with built-in circuit including the photodiode'
[patent_app_type] => new
[patent_app_number] => 09/984657
[patent_app_country] => US
[patent_app_date] => 2001-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[patent_no_of_words] => 9558
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[pdf_file] => publications/A1/0038/20020038868.pdf
[firstpage_image] =>[orig_patent_app_number] => 09984657
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/984657 | Photodiode device including window defined in passivation layer for removing electrostatic charge | Oct 29, 2001 | Issued |
Array
(
[id] => 767280
[patent_doc_number] => 07009299
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-03-07
[patent_title] => 'Kinetically controlled solder'
[patent_app_type] => utility
[patent_app_number] => 10/021174
[patent_app_country] => US
[patent_app_date] => 2001-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2653
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[pdf_file] => patents/07/009/07009299.pdf
[firstpage_image] =>[orig_patent_app_number] => 10021174
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/021174 | Kinetically controlled solder | Oct 28, 2001 | Issued |
Array
(
[id] => 6867704
[patent_doc_number] => 20030080393
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-01
[patent_title] => 'Encapsulated energy-dissipative fuse for integrated circuits and method of making the same'
[patent_app_type] => new
[patent_app_number] => 10/002447
[patent_app_country] => US
[patent_app_date] => 2001-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2605
[patent_no_of_claims] => 18
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[pdf_file] => publications/A1/0080/20030080393.pdf
[firstpage_image] =>[orig_patent_app_number] => 10002447
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/002447 | Encapsulated energy-dissipative fuse for integrated circuits and method of making the same | Oct 25, 2001 | Issued |
Array
(
[id] => 6091968
[patent_doc_number] => 20020050599
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-02
[patent_title] => 'Array substrate for liquid crystal display device and method for manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 09/984027
[patent_app_country] => US
[patent_app_date] => 2001-10-26
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0050/20020050599.pdf
[firstpage_image] =>[orig_patent_app_number] => 09984027
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/984027 | Array substrate for liquid crystal display device and method for manufacturing the same | Oct 25, 2001 | Abandoned |
Array
(
[id] => 6384845
[patent_doc_number] => 20020179942
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-05
[patent_title] => 'Semiconductor component'
[patent_app_type] => new
[patent_app_number] => 10/007397
[patent_app_country] => US
[patent_app_date] => 2001-10-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0179/20020179942.pdf
[firstpage_image] =>[orig_patent_app_number] => 10007397
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/007397 | Transistor having compensation zones enabling a low on-resistance and a high reverse voltage | Oct 21, 2001 | Issued |
Array
(
[id] => 5870581
[patent_doc_number] => 20020047145
[patent_country] => US
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[patent_issue_date] => 2002-04-25
[patent_title] => ' MRAM device including spin dependent tunneling junction memory cells'
[patent_app_type] => new
[patent_app_number] => 09/981277
[patent_app_country] => US
[patent_app_date] => 2001-10-17
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[pdf_file] => publications/A1/0047/20020047145.pdf
[firstpage_image] =>[orig_patent_app_number] => 09981277
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/981277 | Spin dependent tunneling junctions including ferromagnetic layers having flattened peaks | Oct 16, 2001 | Issued |
| 09/958657 | Optical semiconductor module an light amplifier | Oct 11, 2001 | Abandoned |
Array
(
[id] => 1037840
[patent_doc_number] => 06872992
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-29
[patent_title] => 'Semiconductor device for detecting wide wavelength ranges'
[patent_app_type] => utility
[patent_app_number] => 09/974817
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[firstpage_image] =>[orig_patent_app_number] => 09974817
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/974817 | Semiconductor device for detecting wide wavelength ranges | Oct 11, 2001 | Issued |
Array
(
[id] => 6287735
[patent_doc_number] => 20020054465
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[patent_issue_date] => 2002-05-09
[patent_title] => 'Internally panel-mounted surge protector'
[patent_app_type] => new
[patent_app_number] => 09/960052
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 09960052
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/960052 | Internally panel-mounted surge protector | Sep 19, 2001 | Pending |
Array
(
[id] => 1097519
[patent_doc_number] => 06822333
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[patent_kind] => B1
[patent_issue_date] => 2004-11-23
[patent_title] => 'Methods of filling constrained spaces with insulating materials and/or of forming contact holes and/or contacts in an integrated circuit'
[patent_app_type] => B1
[patent_app_number] => 09/954382
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[firstpage_image] =>[orig_patent_app_number] => 09954382
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/954382 | Methods of filling constrained spaces with insulating materials and/or of forming contact holes and/or contacts in an integrated circuit | Sep 11, 2001 | Issued |
Array
(
[id] => 6204836
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[patent_issue_date] => 2002-06-13
[patent_title] => 'Photovoltaic device'
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[patent_app_number] => 09/947317
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[firstpage_image] =>[orig_patent_app_number] => 09947317
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/947317 | Photovoltaic device with intrinsic amorphous film at junction, having varied optical band gap through thickness thereof | Sep 4, 2001 | Issued |
Array
(
[id] => 6718680
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[patent_issue_date] => 2003-03-20
[patent_title] => 'APPARATUS AND METHOD FOR IMPROVED POWER BUS ESD PROTECTION'
[patent_app_type] => new
[patent_app_number] => 09/946247
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[firstpage_image] =>[orig_patent_app_number] => 09946247
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/946247 | Apparatus and method for improved power bus ESD protection | Sep 4, 2001 | Issued |
Array
(
[id] => 6365889
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[patent_title] => 'Avalanche photo-diode and fabrication method thereof'
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Array
(
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[patent_title] => 'ANGELED EDGE CONNECTIONS FOR MULTICHIP STRUCTURES'
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[firstpage_image] =>[orig_patent_app_number] => 09944957
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/944957 | Angled edge connections for multichip structures | Aug 29, 2001 | Issued |
Array
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[patent_title] => 'Method of reducing the extrinsic body resistance in a silicon-on-insulator body contacted MOSFET'
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[patent_app_number] => 09/940297
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/940297 | Method of reducing the extrinsic body resistance in a silicon-on-insulator body contacted MOSFET | Aug 27, 2001 | Issued |