
Monica Lewis
Supervisory Patent Examiner (ID: 18105, Phone: (571)272-1838 , Office: P/2838 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822, 2306, 2787, 2894, 2838, 2786 |
| Total Applications | 496 |
| Issued Applications | 294 |
| Pending Applications | 25 |
| Abandoned Applications | 178 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6933418
[patent_doc_number] => 20010054762
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-12-27
[patent_title] => 'Semiconductor device and method of fabricating the same'
[patent_app_type] => new
[patent_app_number] => 09/863077
[patent_app_country] => US
[patent_app_date] => 2001-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7672
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0054/20010054762.pdf
[firstpage_image] =>[orig_patent_app_number] => 09863077
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/863077 | Semiconductor device and method of fabricating the same | May 22, 2001 | Abandoned |
Array
(
[id] => 6900813
[patent_doc_number] => 20010022396
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-09-20
[patent_title] => 'Fan-out semiconductor chip assembly'
[patent_app_type] => new
[patent_app_number] => 09/863927
[patent_app_country] => US
[patent_app_date] => 2001-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8801
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 201
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0022/20010022396.pdf
[firstpage_image] =>[orig_patent_app_number] => 09863927
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/863927 | Fan-out semiconductor chip assembly | May 22, 2001 | Abandoned |
Array
(
[id] => 1229997
[patent_doc_number] => 06696752
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-02-24
[patent_title] => 'Encapsulated semiconductor device with flash-proof structure'
[patent_app_type] => B2
[patent_app_number] => 09/862347
[patent_app_country] => US
[patent_app_date] => 2001-05-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/696/06696752.pdf
[firstpage_image] =>[orig_patent_app_number] => 09862347
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/862347 | Encapsulated semiconductor device with flash-proof structure | May 21, 2001 | Issued |
Array
(
[id] => 6290396
[patent_doc_number] => 20020055224
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-09
[patent_title] => 'Method for forming dual workfunction high-performance support MOSFETs in EDRAM arrays'
[patent_app_type] => new
[patent_app_number] => 09/862827
[patent_app_country] => US
[patent_app_date] => 2001-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 6251
[patent_no_of_claims] => 59
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[pdf_file] => publications/A1/0055/20020055224.pdf
[firstpage_image] =>[orig_patent_app_number] => 09862827
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/862827 | Method for forming dual workfunction high-performance support MOSFETs in EDRAM arrays | May 21, 2001 | Issued |
Array
(
[id] => 5870666
[patent_doc_number] => 20020047185
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-25
[patent_title] => 'Lead frame tooling design for bleed barrier groove'
[patent_app_type] => new
[patent_app_number] => 09/862067
[patent_app_country] => US
[patent_app_date] => 2001-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3351
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[pdf_file] => publications/A1/0047/20020047185.pdf
[firstpage_image] =>[orig_patent_app_number] => 09862067
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/862067 | Lead frame tooling design for bleed barrier groove | May 20, 2001 | Abandoned |
Array
(
[id] => 1352436
[patent_doc_number] => 06583499
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-06-24
[patent_title] => 'Quad flat non-leaded package and leadframe for use in a quad flat non-leaded package'
[patent_app_type] => B2
[patent_app_number] => 09/861757
[patent_app_country] => US
[patent_app_date] => 2001-05-21
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/583/06583499.pdf
[firstpage_image] =>[orig_patent_app_number] => 09861757
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/861757 | Quad flat non-leaded package and leadframe for use in a quad flat non-leaded package | May 20, 2001 | Issued |
Array
(
[id] => 6107173
[patent_doc_number] => 20020171125
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-21
[patent_title] => 'Organic semiconductor devices with short channels'
[patent_app_type] => new
[patent_app_number] => 09/860107
[patent_app_country] => US
[patent_app_date] => 2001-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 3188
[patent_no_of_claims] => 42
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0171/20020171125.pdf
[firstpage_image] =>[orig_patent_app_number] => 09860107
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/860107 | Organic semiconductor devices with short channels | May 16, 2001 | Abandoned |
Array
(
[id] => 6888524
[patent_doc_number] => 20010023979
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-09-27
[patent_title] => 'Method and system for dicing wafers, and semiconductor structures incorporating the products thereof'
[patent_app_type] => new
[patent_app_number] => 09/855617
[patent_app_country] => US
[patent_app_date] => 2001-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4778
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 6
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
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[pdf_file] => publications/A1/0023/20010023979.pdf
[firstpage_image] =>[orig_patent_app_number] => 09855617
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/855617 | Semiconductor structure and package including a chip having chamfered edges | May 14, 2001 | Issued |
Array
(
[id] => 687879
[patent_doc_number] => 07078819
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-07-18
[patent_title] => 'Microelectronic packages with elongated solder interconnections'
[patent_app_type] => utility
[patent_app_number] => 09/854269
[patent_app_country] => US
[patent_app_date] => 2001-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/07/078/07078819.pdf
[firstpage_image] =>[orig_patent_app_number] => 09854269
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/854269 | Microelectronic packages with elongated solder interconnections | May 10, 2001 | Issued |
Array
(
[id] => 5870697
[patent_doc_number] => 20020047199
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[patent_kind] => A1
[patent_issue_date] => 2002-04-25
[patent_title] => 'Semiconductor device, manufacturing method of semiconductor device, stack type semiconductor device, and manufacturing method of stack type semiconductor device'
[patent_app_type] => new
[patent_app_number] => 09/852847
[patent_app_country] => US
[patent_app_date] => 2001-05-11
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0047/20020047199.pdf
[firstpage_image] =>[orig_patent_app_number] => 09852847
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/852847 | Semiconductor device, manufacturing method of semiconductor device, stack type semiconductor device, and manufacturing method of stack type semiconductor device | May 10, 2001 | Issued |
Array
(
[id] => 6897498
[patent_doc_number] => 20010045663
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-29
[patent_title] => 'Semiconductor circuit device and method for manufacturing thereof'
[patent_app_type] => new
[patent_app_number] => 09/851987
[patent_app_country] => US
[patent_app_date] => 2001-05-10
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[pdf_file] => publications/A1/0045/20010045663.pdf
[firstpage_image] =>[orig_patent_app_number] => 09851987
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/851987 | Semiconductor circuit device and method for manufacturing thereof | May 9, 2001 | Abandoned |
Array
(
[id] => 1400290
[patent_doc_number] => 06545357
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-04-08
[patent_title] => 'Metal nitride barrier layer and electroplating seed layer with the same metal as the metal nitride layer'
[patent_app_type] => B2
[patent_app_number] => 09/853451
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/853451 | Metal nitride barrier layer and electroplating seed layer with the same metal as the metal nitride layer | May 8, 2001 | Issued |
Array
(
[id] => 6713864
[patent_doc_number] => 20030025212
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[patent_issue_date] => 2003-02-06
[patent_title] => 'Semiconductor LED flip-chip with high reflectivity dielectric coating on the mesa'
[patent_app_type] => new
[patent_app_number] => 09/852857
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/852857 | Semiconductor LED flip-chip with high reflectivity dielectric coating on the mesa | May 8, 2001 | Issued |
Array
(
[id] => 440245
[patent_doc_number] => 07259448
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-21
[patent_title] => 'Die-up ball grid array package with a heat spreader and method for making the same'
[patent_app_type] => utility
[patent_app_number] => 09/849537
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/849537 | Die-up ball grid array package with a heat spreader and method for making the same | May 6, 2001 | Issued |
Array
(
[id] => 1086519
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[patent_issue_date] => 2004-12-14
[patent_title] => 'Buried layer substrate isolation in integrated circuits'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/849047 | Buried layer substrate isolation in integrated circuits | May 3, 2001 | Issued |
Array
(
[id] => 1400040
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[patent_issue_date] => 2003-04-08
[patent_title] => 'Hybrid frame with lead-lock tape'
[patent_app_type] => B2
[patent_app_number] => 09/847689
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[patent_app_date] => 2001-05-02
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[firstpage_image] =>[orig_patent_app_number] => 09847689
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/847689 | Hybrid frame with lead-lock tape | May 1, 2001 | Issued |
Array
(
[id] => 6998393
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[patent_issue_date] => 2001-12-20
[patent_title] => 'Semiconductor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/845747 | Semiconductor device having breakdown voltage limiter regions | Apr 30, 2001 | Issued |
Array
(
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[patent_title] => 'Annealed tunneling emitter'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/837877 | Semiconductor device having a pixel matrix circuit that includes a pixel TFT and a storage capacitor | Apr 18, 2001 | Issued |
Array
(
[id] => 6415185
[patent_doc_number] => 20020125531
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[patent_title] => 'Semiconductor device and method of manufacturing the same'
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[patent_app_number] => 09/837397
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[pdf_file] => publications/A1/0125/20020125531.pdf
[firstpage_image] =>[orig_patent_app_number] => 09837397
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/837397 | Semiconductor device for improving sustaining voltage | Apr 17, 2001 | Issued |