
Monjur Rahim
Examiner (ID: 13026, Phone: (571)270-3890 , Office: P/2436 )
| Most Active Art Unit | 2436 |
| Art Unit(s) | 2492, 2434, 2134, 2436 |
| Total Applications | 1026 |
| Issued Applications | 835 |
| Pending Applications | 72 |
| Abandoned Applications | 139 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11687761
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[patent_title] => 'Radio communication apparatus, radio communication system, and radio communication control method'
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Array
(
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[patent_kind] => A1
[patent_issue_date] => 2015-05-21
[patent_title] => 'DIFFERENT SCALING RATIO IN FEOL / MOL/ BEOL'
[patent_app_type] => utility
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Array
(
[id] => 10258307
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[patent_kind] => A1
[patent_issue_date] => 2015-05-21
[patent_title] => 'Target Point Generation for Optical Proximity Correction'
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[patent_app_date] => 2013-11-15
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Array
(
[id] => 10231001
[patent_doc_number] => 20150115994
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[patent_kind] => A1
[patent_issue_date] => 2015-04-30
[patent_title] => 'OPTIMIZATION OF INTEGRATED CIRCUIT RELIABILITY'
[patent_app_type] => utility
[patent_app_number] => 14/064337
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Array
(
[id] => 9320782
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[patent_title] => 'ARCHITECTURAL PHYSICAL SYNTHESIS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/064067 | Architectural physical synthesis | Oct 24, 2013 | Issued |
Array
(
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[patent_issue_date] => 2014-03-27
[patent_title] => 'DETERMINING APPARATUS, DETERMINING METHOD, AND COMPUTER PRODUCT'
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Array
(
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[patent_doc_number] => 08813005
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[patent_title] => 'Debugging using tagged flip-flops'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/016941 | Debugging using tagged flip-flops | Sep 2, 2013 | Issued |
Array
(
[id] => 9265003
[patent_doc_number] => 20130346932
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[patent_issue_date] => 2013-12-26
[patent_title] => 'INTELLIGENT TIMING ANALYSIS AND CONSTRAINT GENERATION GUI'
[patent_app_type] => utility
[patent_app_number] => 14/010842
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/010842 | Intelligent timing analysis and constraint generation GUI | Aug 26, 2013 | Issued |
Array
(
[id] => 9695574
[patent_doc_number] => 08826205
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[patent_issue_date] => 2014-09-02
[patent_title] => 'Method for verifying digital to analog converter design'
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Array
(
[id] => 9866869
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[patent_issue_date] => 2015-02-12
[patent_title] => 'MASK DESIGN AND DECOMPOSITION FOR SIDEWALL IMAGE TRANSFER'
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[patent_app_number] => 13/960873
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/960873 | Mask design and decomposition for sidewall image transfer | Aug 6, 2013 | Issued |
Array
(
[id] => 10847883
[patent_doc_number] => 08875084
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[patent_kind] => B1
[patent_issue_date] => 2014-10-28
[patent_title] => 'Optimal spare latch selection for metal-only ECOs'
[patent_app_type] => utility
[patent_app_number] => 13/945191
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/945191 | Optimal spare latch selection for metal-only ECOs | Jul 17, 2013 | Issued |
Array
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Array
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[id] => 9800951
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/936910 | Methods for fabricating integrated circuits including generating photomasks for directed self-assembly | Jul 7, 2013 | Issued |
Array
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[id] => 9271191
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[patent_title] => 'COMPUTING DEVICE AND METHOD FOR AUTOMATICALLY CHECKING WIRING INFORMATION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/928797 | Computing device and method for automatically checking wiring information | Jun 26, 2013 | Issued |
Array
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Array
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Array
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